Nec Corporation

Nec Electronics Corporation

Nec Energy Devices, Ltd.

Nobuaki Hamanaka

Ken Inoue

Kaoru Mikagi

Kazutoshi Shiba

Tatsuya Usami

Takashi Yokoyama

Noriaki Oda

Seiji Nagahara

Takuya Maruyama

Atsuki Ono

A method for producing a negative electrode, including a step of subjecting a copper foil to a plasma treatment, a step of coating the copper foil subjected to the plasma treatment, with a slurry including an active material containing a silicon atom, and a step of subjecting the copper foil coated with the slurry to a heat treatment to form an intermetallic compound of copper and silicon at an interface between the copper foil and the active material. A negative electrode including a copper foil, an active material layer including an active material containing a silicon atom on the copper foil, and copper silicide at an interface between the copper foil and the active material.

Negative electrode, method for producing the same, and battery

A method of manufacturing a semiconductor device having a damascene structure contains a process of forming a first interlayer insulating film () and a second interlayer insulating film () formed of a low dielectric-constant film on a substrate, forming via holes () by using a first resist pattern () formed on the second interlayer insulating film, conducting an organic peeling treatment using organic peeling liquid containing amine components and then forming a second resist pattern () on the second interlayer insulating film. After the wet treatment, before a second antireflection coating () is coated so as to be located below the second resist pattern is coated, at least one of an annealing treatment, a plasma treatment, a UV treatment and an organic solvent treatment is carried out to remove amine components which inhibit the catalysis reaction of acid occurring in the resist at the light exposure, thereby preventing degradation of the resolution of the second resist pattern ().

Semiconductor device and method of manufacturing the same

Precision in an etching process is to be improved. A detecting unitdetects a variation of plasma emission intensity at a plurality of wavelengths (an emission band having an intensity peak in the proximity of 358 nm and an emission band having an intensity peak in the proximity of 387 nm) during a dry etching process being performed on either of a nitrogen-containing film formed on a semiconductor substrate or a non-nitrogen film provided in direct contact with the nitrogen-containing film in an etching apparatusAn arithmetic processing unitperforms calculation based on detected variation. A control unitdetermines an endpoint of the dry etching process in consideration of the calculation result.

Method of manufacturing a semiconductor device and apparatus for manufacturing a semiconductor device

A photo mask for fabricating a semiconductor device having a dual damascene structure which has a via coupled with a lower wiring layer and has an upper wiring layer coupled with the via. The via and the upper wiring layer are fabricated by filling a via hole and a wiring groove formed in an interlayer insulating film that is formed on the lower wiring layer with a wiring material. The photo mask has a via alignment mark which is used for aligning the via hole with respect to the lower wiring layer and/or a via alignment mark which is used for aligning the wiring groove with respect to the via hole. The width of the via alignment mark is equal to or larger than the width which is optically detectable and an aspect ratio of the via alignment mark is equal to or larger than one fourth of the aspect ratio of the via hole. Preferably, the width of the via alignment mark is equal to or larger than the width of the via hole.

Photo mask for fabricating semiconductor device having dual damascene structure

A method for forming a silicide of a metal with high-melting-point in a semiconductor device includes the step of removing a higher-density impurity area which acts for prevention of forming the metal-silicide layer on the surface of the impurity-diffused region between the steps of implanting impurities to form an impurity-implanted region and annealing for reactions of cobalt and silicon of the diffused layer. The above-mentioned method of forming the metal-silicide layer on the surface of the impurity-diffused region proceeds smoothly to thereby prevent degradation of the initial gate withstand voltage and a higher sheet resistance.

Method for forming a silicide of metal with a high melting point in a semiconductor device

A method for forming a silicide of a metal with high-melting-point in a semiconductor device includes the step of removing a higher-density impurity area which acts for prevention of refractory-metal-silicification of diffused regions between the steps of implanting impurities to form an impurity-implanted region and annealing for refractory-metal-silicification of the diffused layer. The refractory-metal-silicification of the diffused regions proceeds smoothly to thereby prevent degradation of the initial gate withstand voltage and a higher sheet resistance.

Method for forming a refractory-metal-silicide layer in a semiconductor device

Cobalt is sputtered on a silicon wafer in a deposition chamber of a magnetron sputtering system, and is conveyed to a load-lock chamber where a partial pressure of oxygen and/or the water concentration is controlled with introduction of nitrogen so as to present dicobalt disilicide layers from oxidation, thereby improving the production yield and reliability of the silicide layer morphology.

Process for fabricating semiconductor device having silicide layer with low resistance and uniform profile and sputtering system used therein

In a method of fabricating a semiconductor device in which a metal film is formed that is to serve as the diffusion barrier layer material of a plug electrode material that is used when forming a plug electrode on a diffusion layer electrode or a gate electrode in which a metal silicide layer has been formed, increase in the resistance of the plug electrode is prevented. Immediately after the formation of a plug hole by a dry etching method, silicon ions are implanted with an acceleration voltage of at least 20 KeV and at a dosage of at least 1&times;10 atoms/cm , following which a titanium film and a titanium nitride film are formed as the metal film by a sputtering method without carrying out etching by an RF etching method.

Fabrication method of implanting silicon-ions into the silicon substrate

Method of forming MOS transistor

A method of manufacturing a semiconductor device in which a cobalt silicide layer is formed on a semiconductor substrate. In the method, the semiconductor substrate is prepared, and cobalt is deposited on the semiconductor substrate by sputtering while heating the semiconductor substrate at a temperature approximately equal to 200 degrees Celsius. Thereafter, cobalt is deposited on the semiconductor substrate by sputtering while heating the semiconductor substrate at a temperature between 300 degrees Celsius and 400 degrees Celsius without exposing the semiconductor substrate to the atmosphere. Preferably, the semiconductor substrate is thereafter rapid thermal annealed at a temperature equal to or higher than 500 degrees Celsius in nitrogen atmosphere for a predetermined time. Further, at least a part of cobalt portion or cobalt oxide portion on the semiconductor substrate is removed by wet etching.

Method of manufacturing a semiconductor device

The magnetron sputtering apparatus of this invention has planar bodies,made of a material capable of capturing oxygen and water, heaters,to heat the planar bodies,, an oxygen monitor,and others in a load lock chamber,and separate chamber,. After a metal film has been formed on a silicon substrate,in a film forming chamber, the substrate is subjected to a heating treatment such that a metal silicide layer is formed. Before the silicon substrate being still hot is transferred to the load lock and separate chambers,and,, oxygen and water in the same chambers have been removed. Through this arrangement it is possible to prevent oxidation of the metal silicide layer, and to form a high melting point silicide layer having a low resistance.

Growing community of inventors

Tokyo, Japan

Nobuaki Hamanaka