Mitsubishi Denki Kabushiki Kaisha

Nobuaki Ando

Kenji Kohda

Tsuyoshi Toyama

Shinichi Kobayashi

Kenji Noguchi

A non-volatile memory cell includes a MOS transistor of double gate construction. The MOS memory transistor includes a floating gate structure which includes electrically separated first and second segmented floating gates (4a; 4b). For the purpose of writing data, electrons are independently injected into the first and second segmented floating gates. Data are stored in the MOS memory transistor in three different non-volatile storage levels; one with electron accumulated either one of the two segmented floating gates; another with electrons injected into both of the segmented floating gates; and still another with no electrons accumulated on both of the segmented floating gates.

Non-volatile semiconductor memory device with facility of storing

A variable-threshold non-volatile memory in which a potential falling between a selection and a non-selection level is applied to the gates and the resultant drain current is measured to determine if one of the transistors has an abnormal threshold voltage.

Growing community of inventors

Hyogo, Japan

Nobuaki Ando