Intel Corporation

Nita Chandrasekhar

Sudipto Naskar

Akm Shaestagir Chowdhury

Ryan Pearce

Christopher Parker

Michael Makowski

Minyoung Lee

Transistors structures comprising a semiconductor features and dielectric material comprising silicon and oxygen in gaps or spaces between the features. The dielectric material may fill the gaps from bottom-up with an atomic layer deposition (ALD) process that includes a silicon deposition phase, and an oxidation phase augmented by N:NHplasma activated nitrogen species. Being plasma activated, the nitrogen species have short mean free paths, and therefore preferentially passivate surfaces with low aspect ratios. This aspect-ratio dependent passivation may increase an energy barrier to surface reactions with a silicon precursor, resulting in a concomitant differential in deposition rate. With N:NHplasma passivation, deposited dielectric material may have a nitrogen concentration that varies by at least order of magnitude as a function of the aspect ratio of the filled gaps.

Gap fill dielectrics for electrical isolation of transistor structures in the manufacture of integrated circuits

An integrated circuit structure, comprises a dielectric material having an opening therein, the opening defined by sides and a bottom. A graphene barrier material is conformal to the sides and the bottom of the opening, and a conductive metal over the graphene barrier material that fills at least a portion of a remainder of the opening in the dielectric material. The graphene barrier is formed by applying a non-hydrogen based plasma pretreatment to the dielectric surface, including the sides and the bottom of the opening, to substantially remove any passivation and provide an activated dielectric surface. A carbon-based precursor is exposed to the activated dielectric surface at less than approximately 400&#xb0; C. to form the graphene barrier.

Deposition of graphene on a dielectric surface for next generation interconnects

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Portland, OR, United States of America

Nita Chandrasekhar