Texas Instruments Corporation

Freescale Semiconductor,inc.

Ning Tan

Weidong Tian

Jose A Rodriguez-Latorre

An apparatus with a burn-in board containing a microcontroller unit and a heater socket for insitu testing of a packaged integrated circuit while under stress. A method for insitu testing of a packaged integrated circuit while under stress. A method for insitu testing of multiple packaged integrated circuits while under stress.

Low cost apparatus for insitu testing of packaged integrated circuits during stressing

An integrated circuit contains a flash cell in which the top gate of the sense transistor is a metal sense gate over the floating gate. The source/drain regions of the sense transistor extend under the floating gate so that the source region is separated from the drain region by a sense channel length less than 200 nanometers. The floating gate is at least 400 nanometers wide, so the source/drain regions of the sense transistor extend under the floating gate at least 100 nanometers on each side. The integrated circuit is formed by forming the sense transistor source and drain regions before forming the floating gate.

Low cost flash memory fabrication flow based on metal gate process

Fabrication flow based on metal gate process for making low cost flash memory

A method is for operating a memory having a group of non-volatile memory cells. A first programming pulse is applied to a subset of the group of non-volatile memory cells. The subset needs additional programming. A portion of the subset still needing additional programming is identified. A ratio of the number of memory cells in the subset and the number of memory cells in the portion is determined. A size of a second programming pulse based on the ratio is selected. The second programming pulse is applied to the portion.

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Allen, TX, United States of America

Ning Tan