United Microelectronics Corp.

Neng H Shen

Water Lur

Anna Su

A new planarized device isolation structure within a semiconductor substrate is described. The device isolation structure comprises narrow device isolation regions each consisting of a deep trench having a thin oxide covering its sidewalls and bottom and filled with silicon oxide, wide device isolation regions each consisting of two deep trenches flanking a shallow trench wherein each deep trench has a thin oxide covering its sidewalls and bottom and is filled with silicon oxide and wherein the shallow trench is filled with a field oxide. The top surface of the narrow and wide device isolation regions and the semiconductor substrate is planarized.

Planarized local oxidation by trench-around technology

A method of local oxidation using trench-around technology is described. A first silicon oxide layer is deposited over the surface of a silicon substrate. A plurality of wide and narrow openings are etched through portions of the first silicon oxide layer not covered by a mask pattern to the silicon substrate. A layer of silicon nitride is patterned to form a set of spacers on the sidewalls of the patterned first silicon oxide layer which will fill the narrow openings. The first silicon oxide layer is partially etched away whereby the substrate within the central portions of the wide openings will be etched to form shallow trenches. The patterned first silicon oxide layer and the silicon nitride spacers are covered with spin-on-glass material which is baked and cured, then etched back leaving the spin-on-glass material only within the wide openings within the shallow trenches. The silicon nitride spacers are removed and deep trenches are etched into the silicon substrate under the spacers whereby the deep trenches are formed at the location of the narrow openings and at the outside edges of the wide openings flanking the shallow trenches. The deep trenches are filled with a second silicon oxide deposit. Field oxide regions are grown on within the shallow trenches, completing the device isolation.

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Hsing-Chu, Taiwan

Neng H Shen