Kla Tencor Corporation

Schlumberger Technology Corporation

Schlumberger Technologies, Inc.

Kla-tencor Technologies Corporation

Fairchild Camera and Instrument Corp.

Neil W Richardson

Akella V S Satya

David Lewis Adler

David J Walker

Gustavo A Pinto

Robert Thomas Long

Lynda C Mantalas

Kurt H Weiner

Jacques J Orban

Bin-Ming Benjamin Tsai

Kevin M Monahan

Christopher G Talbot

Douglas K Masnaghetti

Stefano E Concina

Farid Askary

Mark Armstrong McCord

Hitoshi Takahashi

Kenneth R Wilsher

Brian C Leslie

Jun Pei

A charged particle optic apparatus for improvement in resolution of an electrostatic, multi-beam column is disclosed. The charged particle optic apparatus includes an electrostatic lens array having a first plurality of apertures and a first magnetic pole piece disposed proximate the electrostatic lens array. The first magnetic pole piece includes a second plurality of apertures. The charged particle optic apparatus also includes a second magnetic pole piece disposed proximate the electrostatic lens array such that the electrostatic lens array is between the first magnetic pole piece and the second magnetic pole piece. The second magnetic pole piece includes a third plurality of apertures. The first, second and third pluralities of apertures are aligned with each other. The charged particle optic apparatus may be implemented in a charged particle beam system.

High resolution charged particle projection lens array using magnetic elements

Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.

Test structures and methods for inspection of semiconductor integrated circuits

Disclosed is a semiconductor die having an upper layer and a lower layer. The die includes a lower test structure formed in the lower metal layer of the semiconductor die. The lower conductive test structure has a first end and a second end, wherein the first end is coupled to a predetermined voltage level. The die also has an insulating layer formed over the lower metal layer and an upper test structure formed in the upper metal layer of the semiconductor die. The upper conductive test structure is coupled with the second end of the lower conductive test structure, and the upper metal layer being formed over the insulating layer. The die further includes at least one probe pad coupled with the upper test structure. Preferably, the first end of the lower test structure is coupled to a nominal ground potential. In another implementation, the upper test structure is a voltage contrast element. In another embodiment, a semiconductor die having a scanning area is disclosed. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The die includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The first plurality of test structures or the second plurality of test structures has a probe pad coupled to at least one test structure.

Dual probe test structures for semiconductor integrated circuits

Disclosed is a method of inspecting a sample. The method includes moving to a first field associated with a first group of test structures. The first group of test structures are partially within the first field. The method further includes scanning the first field to determine whether there are any defects present within the first group of test structures. When it is determined that there are defects within the first group of test structures, the method further includes repeatedly stepping to areas and scanning such areas so as to determine a specific defect location within the first group of test structures. A suitable test structure for performing this method is also disclosed.

Stepper type test structures and methods for inspection of semiconductor integrated circuits

Simultaneous flooding and inspection for charge control in an electron beam inspection machine

Disclosed is a semiconductor die having a lower test structure formed in a lower metal layer of the semiconductor die. The lower conductive test structure has a first end and a second end. The first end is coupled to a predetermined voltage level. The semiconductor die also includes an insulating layer formed over the lower metal layer. The die further includes an upper test structure formed in an upper metal layer of the semiconductor die. The upper conductive test structure is coupled with the second end of the lower conductive test structure. The upper metal layer is formed over the insulating layer. In a specific implementation, the first end of the lower test structure is coupled to ground. In another embodiment, the semiconductor die also includes a substrate and a first via coupled between the first end of the lower test structure and the substrate. In yet another aspect, the lower test structure is an extended metal line, and the upper test structure is a voltage contrast element. Methods for inspecting and fabricating such semiconductor die are also disclosed.

Inspectable buried test structures and methods for inspecting the same

Disclosed is, a method for detecting electrical defects on test structures of a semiconductor die. The semiconductor die includes a plurality of electrically-isolated test structures and a plurality of non-electrically-isolated test structures. Voltages are established for the plurality of electrically-isolated test structures. These voltages are different than the voltages of the plurality of non-electrically-isolated test structures. A region of the semiconductor die is continuously inspected in a first direction thereby obtaining voltage contrast data indicative of whether there are defective test structures. The voltage contrast data is analyzed to determine whether there are one or more defective test structures.

Continuous movement scans of test structures on semiconductor integrated circuits

Disclosed is a method of inspecting a sample. The sample is illuminated with an incident beam, thereby causing voltage contrast within structures present on the sample. Voltage contrast is detected within the structures. Information from the detected voltage contrast is stored, and position data concerning the location of features corresponding to at least a portion of the stored voltage contrast information is also stored. In a specific embodiment, the features represent electrical defects present on the sample. In another embodiment, the stored position data is in the form of a two dimensional map. In another aspect, the sample is re-inspected and the stored position data is used in analyzing data resulting from the re-inspection.

Methods and apparatus for generating spatially resolved voltage contrast maps of semiconductor test structures

A system and method for controlling electron exposure on image specimens by adjusting a raster scan area in-between scan frame cycles. A small, zoomed-in, scan area and the surrounding area are flooded with positive charge for a number of frame cycles between scan frames to reduce the voltage differential between the scan area and surrounding area, thereby reducing the positive charge buildup which tends to obscure small features in scanned images. The peak current into a pixel element on the specimen is reduced by scanning the beam with a line period that is very short compared to regular video. Frames of image data may further be acquired non-sequentially, in arbitrarily programmable patterns. Alternatively, an inert gas can be injected into the scanning electron microscope at the point where the electron beam impinges the specimen to neutralize a charge build-up on the specimen by the ionization of the inert gas by the electron beam.

Electron beam dose control for scanning electron microscopy and critical dimension measurement instruments

Electron beam dose control for scanning electron microscopy and critical

In accordance with illustrative embodiments of the present invention, a measuring-while-drilling system includes a sensor sub positioned at the lower end of a downhole motor assembly so that the sub is located near the drill bit. The sub houses instrumentalities that measure various downhole parameters such as inclination of the borehole, the natural gamma ray emission of the formations, the electrical resistivity of the formations, and a number of mechanical drilling performance parameters. Sonic or electromagnetic telemetry signals representing these measurements are transmitted uphole to a receiver associated with a convential MWD tool located above the motor, and telemetered by this tool to the surface substantially in real time. The system has particular application to accurate control over the drilling of extended reach and horizontally drilled wells.

Method for directionally drilling a borehole

In accordance with illustrative embodiments of the present invention, a measuring-while-drilling system includes a sensor sub positioned at the lower end of a downhole motor assembly so that the sub is located near the drill bit. The sub houses instrumentalities that measure various downhole parameters such as inclination of the borehole, the natural gamma ray emission of the formations, the electrical resistivity of the formations, and a number of mechanical drilling performance parameters. Sonic or electromagnetic telemetry signals representing these measurements are transmitted uphole to a receiver associated with a conventional MWD tool located above the motor, and telemetered by this tool to the surface substantially in real time. The system has particular application to accurate control over the drilling of extended reach and horizontally drilled wells.

Method of and apparatus for making near-bit measurements while drilling

An electron-beam test probe system (400) in which a pulsed laser-beam source (404) and a photocathode assembly (430) are used with an electron-beam column (426) to produce a pulsed electron beam at a stabilized repetition frequency. A pulse picker (414) allows the pulse repetition frequency of the pulsed electron beam to be reduced to a submultiple of the pulsed laser repetition frequency. A test pattern generator (416) is programmable to apply a desired pattern of test vector patterns to an electronic circuit to be probed, the test vector patterns being synchronized with the stabilized laser-beam pulse repetition frequency. A timebase circuit (412) allows the test vector patterns to be time-shifted relative to the pulsed electron beam. The electronic circuit under test can thus be probed at any desired point in the applied test vector pattern by control of the pulse picker and by time-shifting the test vector pattern.

Growing community of inventors

Houston, TX, United States of America

Neil W Richardson