Fuji Electric Co., Ltd.

National Institute of Advanced Industrial Science and Technology

Naoyuki Ohse

Shinsuke Harada

Yusuke Kobayashi

Takahito Kojima

Makoto Utsumi

Yasuhiko Oonishi

Manabu Takei

Kenji Fukuda

Tsunehiro Nakajima

Fumikazu Imai

Mitsuo Okamoto

Yuichi Hashizume

Takumi Fujimoto

Yoshiyuki Sakai

Mina Ryo

Takuya Komatsu

Takafumi Uchida

At a front surface of a silicon carbide base, an n−-type drift layer, a p-type base layer, a first n+-type source region, a second n+-type source region, and a trench that penetrates the first and the second n+-type source regions and the p-type base layer and reaches the n-type region are provided. In the trench, the gate electrode is provided via a gate insulating film, an interlayer insulating film is provided in the trench on the gate electrode, and a barrier metal is provided in the trench on the interlayer insulating film.

Semiconductor device having a gate electrode, an interlayer insulating film and a barrier metal provided in a trench

A silicon carbide semiconductor device, including a semiconductor substrate containing silicon carbide, a bonding wire, and a surface electrode of an aluminum alloy containing silicon, the surface electrode being provided on a surface of the semiconductor substrate, and having a joint portion to which the bonding wire is bonded. The surface electrode has a plurality of silicon nodules formed therein, which include a number of the silicon nodules formed in the joint portion. One of the number of the silicon nodules is of a dendrite structure, and is included at an area percentage of at least 10% relative to a total area of the number of the silicon nodules in the joint portion.

Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

A method of manufacturing a silicon carbide semiconductor device, including forming a first-conductivity-type region in a SiC semiconductor substrate, selectively forming a plurality of second-conductivity-type regions in the first-conductivity-type region, forming an interlayer insulating film covering the first-conductivity-type region and the second-conductivity-type regions, selectively removing the interlayer insulating film to form a plurality of openings exposing the second-conductivity-type regions, forming, in each opening, a layered metal film having a cap film stacked on an aluminum film, thermally diffusing aluminum atoms in the aluminum film to thereby form a plurality of second-conductivity-type high-concentration regions, removing the layered metal film, selectively removing the interlayer insulating film to form a contact hole, forming a first electrode by sequentially stacking a titanium film and a metal film containing aluminum on the first surface of the semiconductor substrate in the contact hole, and forming a second electrode on the second main surface of the semiconductor substrate.

An SBD of a JBS structure has on a front side of a semiconductor substrate, nickel silicide films in ohmic contact with p-type regions and a FLR, and a titanium film forming a Schottky junction with an n-type drift region. A thickness of each of the nickel silicide films is in a range from 300 nm to 700 nm. The nickel silicide films each has a first portion protruding from the front surface of the semiconductor substrate in a direction away from the front surface of the semiconductor substrate, and a second portion protruding in the semiconductor substrate from the front surface of the semiconductor substrate in a depth direction. A thickness of the first portion is equal to a thickness of the second portion. A width of the second portion is wider than a width of the first portion.

Silicon carbide semiconductor device

In a method of manufacturing a silicon carbide semiconductor device that is a silicon carbide diode having a JBS structure including a mixture of a Schottky junction and a pn junction and that maintains low forward voltage through a SBD structure and enhances surge current capability, nickel silicide films are formed in an oxide film by self-alignment by causing a semiconductor substrate and a metal material film to react with one another through two sessions of heat treatment including a low-temperature heat treatment and a high-temperature heat treatment, the metal material film including sequentially a first nickel film, an aluminum film, and a second nickel film, the first nickel film being in contact with an entire area of a connecting region of a FLR and p-type regions respectively exposed in openings of the oxide film.

Method of manufacturing silicon carbide semiconductor device

A semiconductor device having, in a plan view, a termination region surrounding an active region. The semiconductor device includes a semiconductor substrate containing silicon carbide, a first-conductivity-type region provided in the semiconductor substrate at its first main surface, a plurality of first second-conductivity-type regions selectively formed in the semiconductor substrate at its first main surface, a plurality of silicide films respectively in ohmic contact with the first second-conductivity-type regions, a first electrode that is in contact with the silicide films to form ohmic regions, with the first second-conductivity-type regions to form non-operating regions, and with the first-conductivity-type region to form Schottky regions, a second electrode provided at a second main surface of the semiconductor substrate, and a second second-conductivity-type region provided in the termination region. The ohmic regions, the non-operating regions and the Schottky regions are formed in the active region in a striped pattern. The second second-conductivity-type region connects the ohmic regions and the non-operating regions.

A semiconductor device including a silicon carbide semiconductor substrate having a first-conductivity-type region at its first main surface. The semiconductor device has, at the first main surface, a plurality of first second-conductivity-type regions and a second second-conductivity-type region selectively provided in the first-conductivity-type region, respectively in an active region and a connecting region of the semiconductor device, and an oxide film provided in a termination region of the semiconductor device and having an inner end that faces the active region. A first silicide film is in ohmic contact with the first second-conductivity-type regions. A second silicide film is in contact with the inner end of the oxide film and in ohmic contact with the second second-conductivity-type region. The semiconductor device has a first electrode including a titanium film and a metal electrode film stacked sequentially on the first main surface, and a second electrode provided at a second main surface.

A silicon carbide semiconductor device includes plural p-type silicon carbide epitaxial layers provided on an n-type silicon carbide substrate. In some of the p-type silicon carbide epitaxial layers, an nsource region is provided in at least a region of an upper portion. The nsource region includes a first portion that contains arsenic and a second portion that contains phosphorous.

Silicon carbide semiconductor device and manufacturing method for silicon carbide semiconductor device

A semiconductor device includes a first electrode, a silicon carbide substrate having a first surface electrically connected with the first electrode and a second surface opposite to the first surface, an ohmic junction layer disposed on the second surface, and a second electrode disposed on the ohmic junction layer. The ohmic junction layer has a first layer that is directly disposed on the second surface and includes a first silicide of titanium and a first silicide of a metal element other than titanium, and a second layer that is directly disposed on the first layer, includes a second silicide of titanium and a second silicide of the metal element, and has a lower titanium concentration than the first layer.

Semiconductor device and method for manufacturing semiconductor device

A first p-type region in contact with a bottom of a gate trench is disposed in a striped shape extending along a first direction that is orthogonal to a second direction along which the gate trench extends in a striped shape, as viewed from a front surface of a silicon carbide substrate. As a result, trench gate MOSFETs are disposed in parallel at a predetermined cell pitch along the first direction. A flat SBD is disposed at a predetermined cell pitch along the second direction. The cell pitch of the trench gate MOSFET and the cell pitch of the flat SBD may be set independently of each other.

Semiconductor device

In an n-type current diffusion region, a first p-type region underlying a bottom of a trench (gate trench) is provided. In the n-type current diffusion region, a second p-type region is provided between adjacent trenches, separated from the first p-type region and in contact with the p-type base region. In the p-type base region, near a side wall of the trench, a third p-type region is provided a predetermined distance from the side wall of the trench and is separated from the first and the second p-type regions. The third p-type region extends in a depth direction, substantially parallel to the side wall of the trench. A drain-side end of the third p-type region is in contact with the n-type current diffusion region or protrudes a predetermined depth from the interface of the p-type base region and the n-type current diffusion region toward the drain.

A vertical MOSFET having a trench gate structure includes an n-type drift layer and a p-type base layer formed by epitaxial growth. In the n-type drift layer, an n-type region, an upper second p-type region, a lower second p-type region and a first p-type region are provided. The lower second p-type region is provided orthogonal to a trench, and a total mathematical area regions that are between the first p-type region and the p-type base layer and that include the n-type region is at least two times a total mathematical area of regions that are between the first p-type region and the p-type base layer and that include the upper second p-type region.

Silicon carbide semiconductor device and method of manufacturing a silicon carbide semiconductor device

In a semiconductor device having a first p-type base region, a second p-type base region, a high-concentration n-type region selectively formed in an n-type silicon carbide epitaxial layer on an n-type silicon carbide substrate; a p-type base layer formed on the n-type silicon carbide epitaxial layer; an n-type source region and a p-type contact region selectively formed in a surface layer of the p-type base layer; and a trench formed penetrating the p-type base layer and shallower than the second p-type base region, in at least a part of the first p-type base region, a region is shallower than the second p-type base region as viewed from an element front surface side.

Semiconductor device having a trench structure

A vertical MOSFET having a trench gate structure includes an n-type drift layer and a p-type base layer formed by epitaxial growth. In the n-type drift layer, an n-type region, first p-type regions, and a second p-type region are provided. In a region opposing, in a depth direction, a gate electrode pad connected to a gate electrode, the first p-type regions are provided with intervals therebetween along a width direction of the trench gate.

Semiconductor device having semiconductor regions with an interval therebetween in a gate pad region

In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n-type semiconductor region is formed in a surface layer of the back surface of an n-type epitaxial substrate by ion implantation. In this ion implantation, the impurity concentration of the n-type semiconductor region is a predetermined range and preferably a predetermined value or less, and an n-type impurity is implanted by acceleration energy of a predetermined range such that the n-type semiconductor region has a predetermined thickness or less. Thereafter, a nickel layer and a titanium layer are sequentially formed on the surface of the n-type semiconductor region, the nickel layer is heat treated to form a silicide, and the ohmic electrode formed from nickel silicide is formed. In this manner, a back surface electrode that has favorable properties can be formed while peeling of the back surface electrode can be suppressed.

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Matsumoto, Japan

Naoyuki Ohse