Nec Corporation

Japan E.m. Co., Ltd.

Naoji Senba

Yuzo Shimada

Nobuaki Takahashi

Koji Soejima

Takuo Funaya

Koji Matsui

Tadanori Shimoto

Manabu Bonkohara

Kenichi Tokuno

Atsushi Nishizawa

Kazuaki Utsumi

Takao Yamazaki

Kazuyuki Mikubo

Akihiro Dohya

Teruo Kusaka

Kazuhiko Futakami

Kouji Matsui

Hideki Kusamitu

Katsumasa Hashimoto

Makoto Ohtsuka

Akira Hatase

Ikushi Morizaki

Ikusi Morizaki

Akihiro Doya

Ikushi Morisaki

Kazuaki Utumi

Yuuzou Shimada

Takumi Yamamoto

An electronic device assembly for dense mounting of electronic devices and method of connecting the electronic devices are disclosed. Conductive portions implemented by metal bumps and sealing portions implemented by adhesive seal resin are connected by thermocompression at the same time between two electronic devices. This may be repeated between three or more electronic device.

Electronic device assembly and a method of connecting electronic devices constituting the same

Disclosed is a bump structure, which has a hollow body, for electrically connecting a first member and a second member. Also disclosed is a method for making a bump structure, which has the steps of: preparing a molding plate with a concave mold to mold a bump-forming member; forming a conductive thin film so as to form a predetermined cavity in the concave mold of the molding plate; preparing a substrate to which the conductive thin film is to be transferred; and transferring the conductive thin film formed on the molding plate to the substrate.

Method for making a bump structure

A three-dimensional semiconductor device includes a cylindrical heat sink, wherein a CPU is provided on a substantially center of an inner bottom surface of the cylindrical heat sink, semiconductor chips are respectively mounted on an outer peripheral surface and an inner peripheral surface of the cylindrical heat sink, and the CPU is connected to an upper heat sink.

Three-dimensional semiconductor device and method of manufacturing the same

An apparatus for lining up micro-balls in accordance with the present invention includes: ball carrying pallets having a plurality of pits for holding the micro-balls, respectively, on its surface, a pallet holder for holding the ball carrying pallets, a lining-up container defining a sealed chamber in association with the pallet holder hermetically fitted thereto, a storing tank for storing liquid carrier in which micro-balls are dispersed, and applying/collecting device for communicating the storing tank with the lining-up container via a passage to supply the micro-balls together with the liquid carrier from the storing tank to the sealed chamber and return the surplus micro-balls together with the liquid carrier from the sealed chamber to the storing tank.

Method and apparatus for lining up micro-balls

A solder ball arrangement device has a thin arrangement plate having a plurality of through-holes of a truncated pyramid shape, a porous member bonded to the arrangement plate, and a housing member for receiving the arrangement plate and the porous member for defining an air space inside the housing member. A suction pump is provided to evacuate the air space and to receive an array of solder balls in the through-holes by suction. The through-holes are formed by etching, and the porous member reinforces the thin arrangement plate.

Solder ball arrangement device

There is provided a function element including a resin layer formed on a surface thereof, the resin layer having adhesive property and sealing property, the resin layer having such a pattern that a resin layer does not exist in at least one of following areas: (a) a first area around an area where device performances are influenced by resin of which the resin layer was composed, (b) a second area around pads or bumps, (c) a third area around an area on which a wiring of a substrate will exist when the function element is coupled to the substrate, and (d) a fourth area around an area on which a passive element mounted on a substrate will exist when the function element is coupled to the substrate. The function element prevents extra resin from adhering to an area of the function element where device performances will be influenced by the resin, when the function element is coupled to a substrate with a resin layer being sandwiched therebetween.

Function element, substrate for mounting function element thereon, and method of connecting them to each other

Bump structure and method for making the same

One main surface of a substrate has formed on it an appropriate contact terminal having in one part thereof a protruding part. An end of a lead is mounted via a holding part that is provided between the substrate and a probe, the lead being disposed along the main surface of the substrate so as to peel away from the main surface.

Probe card and method of forming a probe card

The present invention adopts a circuit pattern in which in a carrier of a package for coupling semiconductor devices at multistage, drawing out lines for selecting individual semiconductor devices are coupled in parallel. Thus, the present invention achieves the multistage coupling semiconductor device which can be completed with a circuit pattern of one kind regardless of the number of stages of a multistage. Using the carrier having the foregoing structure, the semiconductor device is assembled and is subjected to characteristic inspections. Thereafter, the circuit patterns, coupled in parallel, having good electrical characteristics are partially cut by either laser, sand-blast, or etching. The products can be specified according to the circuit pattern which is cut.

Multistage coupling semiconductor carrier, semiconductor device using the semiconductor carrier

A semiconductor chip is mounted on a semiconductor chip carrier through a flip chip bonding technique; the semiconductor chip carrier includes an insulating layer such as synthetic resin having a mounting area assigned to the semiconductor chip and a conductive pattern having pads bonded to bumps of the semiconductor chip, and only the pads are formed in the mounting area so that melted synthetic resin smoothly flows into the gaps between the insulating synthetic resin layer and the semiconductor chip.

Semiconductor chip carrier having partially buried conductive pattern and semiconductor device using the same

In a semiconductor package stack module, an LSI (Large Scale Integrated circuit) is mounted, via fine bumps, on a ceramic carrier substrate or a flexible carrier film on which wiring conductors are formed. After a seal resin has been injected, the chip is thinned by, e.g., grinding. A plurality of such carrier substrates or carrier films are connected to each other by bumps via through holes which are electrically connected to the wiring conductors, thereby completing a tridimensional stack module. The module achieves a miniature, thin, dense, low cost, and reliable structure without resorting to a wire bonding system or a TAB (Tape Automated Bonding) system. In addition, the module has a minimum of wiring length and a desirable electric characteristic.

Semiconductor packing stack module and method of producing the same

A probe card comprises the following elements. An insulation film is provided which is flexible and extends on a first surface of a substrate. The insulation film has a first surface in contact with the first surface of the substrate, to form a space region which is defined between the first surface of the substrate and the first surface of the insulation film so as to allow part of the insulation film to move into the space. Probe patterns extend on a second surface of the insulation film so that the probe patterns.

Probe card with plural probe tips on a unitary flexible tongue

A fabrication method of a plastic-molded lead component is provided, in which leads are aligned at a fine pitch of approximately 100 .mu.m or less with a high accuracy, a simplified process sequence, and a low cost. First, a template having opened V-grooves is prepared. The V-grooves extend along a straight line and are aligned in parallel at a fixed pitch. Second, wire pieces are placed in the respective grooves of the template. Third, the placed pieces of the wire pieces are aligned in parallel on the template at a same pitch as that of the grooves. Fourth, a molding compound is supplied onto the template with or without the use of a mold to bury the aligned wire pieces placed in the grooves. Fifth, the molding compound supplied onto the template is cured to form an encapsulation plastic on the template. The wire pieces placed in the grooves are encapsulated by the encapsulation plastic in such a way that both ends of the wire pieces are exposed from opposite sides of the encapsulation plastic. The encapsulated wire pieces serve as leads. Finally, the template is removed from tie encapsulated wire pieces and the encapsulation plastic. The template is preferably formed by a semiconductor material such as silicon.

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Tokyo, Japan

Naoji Senba