Mitsubishi Denki Kabushiki Kaisha

Naohito Yoshida

Tetsuo Kunii

Takao Ishida

Teruyuki Shimura

Yoshitsugu Yamamoto

Satoshi Arimoto

Tomoki Oku

Toshihiko Shiga

Shinichi Miyakuni

Takayuki Hisaka

Masayuki Sakai

Kenji Hosogi

A method of producing a semiconductor device includes a semiconductor substrate and a gate embedding layer. A pair of side walls made of insulating layers having a width are formed on the inner surface of a first opening and the gate embedding layer is formed by using the pair of side walls and a first insulating layer as masks so that the embedded portion and the first extending portion are self-aligned and, consequently, the first extending portion is symmetrical with respect to the embedded portion. Accordingly, the first extending portion of the gate electrode is offset toward the drain electrode or source electrode.

Semiconductor device

A semiconductor device includes a self-aligned refractory metal constituent in a recess in a semiconductor substrate and having the same plane pattern as a bottom surface of the recess. The width of the constituent is determined by the plane pattern of the recess and, accordingly, the pattern width of the constituent is easily controlled by the plane pattern of the recess.

Semiconductor device with refractory metal element

A semiconductor device includes a semiconductor substrate having an active region and first and second external regions located on opposite sides of the active region. The active region has a multi-finger pattern including gate electrodes, source electrodes, and drain electrodes. Each of the gate electrodes is interposed between one of the source electrodes and one of the drain electrodes. Mutually spaced gate pads are disposed on the first external region and each of the gate pads is connected to the gate electrodes. Mutually spaced drain pads are disposed on the second external region, and each of the drain pads is connected to the drain electrodes. Mutually spaced and grounded source pads are disposed on the first and second external regions, and each of the source pads is electrically connected to the source electrodes. Because the source pads are located on both the gate pad side and the drain pad side, the number of source pads having vias can be increased without changing the size of the source pads and the gate pads, reducing the number of source electrodes connected to one via.

A field effect transistor includes a semi-insulating semiconductor substrate; a buffer layer disposed on the substrate and having a high resistance; a first semiconductor layer disposed on the buffer layer and having a relatively high concentration of a dopant impurity; a second semiconductor layer disposed on the first semiconductor layer and having a relatively low concentration of a dopant impurity; a third semiconductor layer disposed on the second semiconductor layer and having a relatively high concentration of a dopant impurity; a fourth semiconductor layer disposed on the third semiconductor layer; and a gate electrode, a source electrode, and a drain electrode disposed on the fourth semiconductor layer wherein the electron affinity of the second semiconductor layer is larger than that of the first and third semiconductor layers, and the difference between the electron affinities of the first and second semiconductor layers proximate their junction is larger than the difference between the electron affinities of the second and third semiconductor layers proximate their junction. The linearity of an output signal with respect to an input signal is improved so that the field effect transistor has improved distortion characteristics and reduced noise on adjacent lines in frequency multiplexed communication.

High electron mobility transistor including asymmetrical carrier supply

A method of fabricating a bipolar transistor includes successively growing a collector layer, a base layer, and a crystalline mask layer on a semiconductor substrate; forming an opening in the crystalline mask layer to expose a portion of the base layer; growing an emitter layer on the crystalline mask layer and on the base layer exposed in the opening of the mask layer; forming an emitter electrode on the emitter layer; removing part of the emitter layer using the emitter electrode as a mask; removing the crystalline mask layer; forming a first resist pattern for formation of base electrodes; forming base electrodes using the first resist pattern and the emitter electrode as masks; removing the first resist pattern; forming a second resist pattern for formation of collector electrodes covering base electrodes and the emitter electrode; using the second resist pattern as a mask, removing portions of the base layer and the collector layer; and forming collector electrodes in contact with the collector layer.

Method of making bipolar transistor

A method of producing a semiconductor device includes preparing a semiconductor ingot having a (100) surface orientation and an orientation flat in a �011! direction; cutting the semiconductor ingot in a plane which is obtained by tilting the (100) surface by an angle .theta. about an axis of the tilting, obtained by rotating the �011! direction by an angle .phi. with the center of the (100) surface as an axis of the rotation, thereby producing a semiconductor wafer having a surface; producing a channel region in the semiconductor wafer; producing a refractory metal gate on the surface of the semiconductor wafer; and using the refractory metal gate as a mask, implanting dopant impurity ions into the semiconductor wafer in a direction perpendicular to the surface of the semiconductor wafer, thereby producing impurity-implanted regions in the semiconductor wafer. Channeling is prevented and the short-channel effect is suppressed.

Method of fabricating semiconductor device

A semiconductor device includes a very low dopant impurity concentration InGaAs active layer in which a two-dimensional electron gas is produced, the active layer being disposed on a semiconductor substrate; a very low dopant impurity concentration spacer layer contacting the active layer at a first surface and having an electron affinity smaller than the electron affinity of the active layer; and a very thin InGaAs electron supply layer having a high n type dopant impurity concentration and contacting the spacer layer opposite the active layer. Degradation of device characteristics due to heating of the device is reduced with a result that a thermally stable and highly reliable semiconductor device is easily realized.

Semiconductor device strucutre having a two-dimensional electron gas and

A heterojunction bipolar transistor includes a multiquantum barrier structure as part of the collector and contacting the base. The MQB has an energy band structure in which the height of the effective potential barrier of the MQB increases in steps from the base into the collector. Therefore, an electric field in the collector in the vicinity of the base-collector interface is relaxed and intervalley scattering of electrons is suppressed whereby a reduction in electron mobility due to the intervalley scattering is suppressed, reducing transit time of electrons in the collector.

Heterojunction bipolar transistor

A semiconductor laser includes a first conductivity type semiconductor substrate; a first conductivity type semiconductor first cladding layer disposed on the substrate; a semiconductor active layer disposed on the first cladding layer; a second conductivity type semiconductor second cladding layer disposed on the active layer; a current concentration and collection structure for confining current flow to part of the active layer including a second conductivity type ridge structure disposed on the second cladding layer, a first conductivity type semiconductor current blocking layer disposed directly on the second cladding layer and adjacent to and contacting the ridge structure, the ridge structure including a semiconductor etch stopping layer different in composition from and disposed on the second cladding layer and a second conductivity type semiconductor third cladding layer disposed on and different in composition from the etch stopping layer, and a second conductivity type semiconductor transition layer; a second conductivity type semiconductor contacting layer contacting the current concentration and collection structure; and first and second electrodes respectively disposed on the substrate and the contacting layer.

Semiconductor laser

A semiconductor structure for a light-interactive semiconductor device includes first and second crystalline semiconductor cladding layers having a first lattice constant and a strained superlattice structure disposed in contact with and between the first and second cladding layers and including alternating first crystalline semiconductor quantum barrier layers having a first and second crystalline semiconductor quantum well layers having a second energy band gap less than the first energy band gap and a third lattice constant wherein the first lattice constant is approximately equal to the average of the second and third lattice constants and the second lattice constant differs from the third lattice constant by at least 0.5 percent of the second lattice constant.

Growing community of inventors

Tokyo, Japan

Naohito Yoshida