International Business Machines Corporation

Macdermid, Incorporated

Nancy C LaBianca

Jeffrey Donald Gelorme

Stephen L Buchwalter

Gareth Geoffrey Hougham

Michael A Gaynes

Claudius Feger

Michael S Gordon

Christopher Vincent Jahnes

Paul Alfred Lauro

Xiao Hu Liu

James Patrick Doyle

S Jay Chey

Michael Joseph Rooks

Theodore Gerard Van Kessel

Kenneth Parker Rodbell

Marie Angelopoulos

Yves Corfield Martin

Stefano Sergio Oggioni

Hosadurga K Shobha

Jane M Shaw

Martin J Goldberg

David Andrew Lewis

Sally Ann Swanson

Son K Tran

Jeffrey W Labadie

Hendrik F Hamann

Peter Alfred Gruber

Supratik Guha

Fuad Elias Doany

David Hirsch Danovitch

Steven Erik Steen

Revathi Iyengar

Jerry Don Ackaret

Aparna Prabhakar

Kenneth F Latzko

Janes Jones, Legal Representative

Jame M Shaw

An energy distribution of soft error-inducing radiation likely to be encountered by an electronic circuit during operation is determined. A tuned radiation source having a source energy distribution similar to the determined energy distribution is prepared. The electronic circuit is tested using the tuned radiation source.

Tunable radiation source

A method for detecting soft errors in an integrated circuit (IC) due to transient-particle emission, the IC comprising at least one chip and a substrate includes mixing an epoxy with a radioactive source to form a hot underfill (HUF); underfilling the chip with the HUF; sealing the underfilled chip; measuring a radioactivity of the HUF at an edge of the chip; measuring the radioactivity of the HUF on a test coupon; testing the IC for soft errors by determining a current radioactivity of the HUF at the time of testing based on the measured radioactivity; and after the expiration of a radioactive decay period of the radioactive source, using the IC in a computing device by a user.

SER testing for an IC chip using hot underfill

A method for fabricating a negative thermal expanding system device includes coating a wafer with a thermally decomposable polymer, patterning the decomposable polymer into repeating disk patterns, releasing the decomposable polymer from the wafer and forming a sheet of repeating patterned disks, suspending the sheet into a first solution with seeding compounds for electroless decomposition, removing the sheet from the first solution, suspending the sheet into a second solution to electrolessly deposit a first layer material onto the sheet, removing the sheet from the second solution, suspending the sheet into a third solution to deposit a second layer of material having a lower TCE value than the first layer of material, separating the patterned disks from one another, and annealing thermally the patterned disks to decompose the decomposable polymer and creating a cavity in place of the decomposable polymer.

Negative thermal expansion system (NTES) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging

A process comprises forming a first electrical interconnect structure on a surface of a singulated semiconductor chip having an alignment pattern, which is scanned and stored in a scanning device prior to application of a curable underfill coating to the surface of the singulated semiconductor chip. A curable underfill coating is applied to the surface of the singulated semiconductor chip to produce a coated semiconductor chip. The scanned and stored alignment pattern is delivered to an alignment and joining device positioned adjacent to and operatively associated with a substrate having a second electrical interconnect structure alignable to make electrical contact with the first electrical interconnect structure. The coated semiconductor chip is placed in the alignment and joining device so that when the scanned and stored alignment pattern is activated the alignment and joining device positions the coated semiconductor chip so that the first electrical interconnect structure is aligned to make electrical contact with the second electrical interconnect structure. The alignment and joining device is activated to join the coated semiconductor chip to the substrate.

Chip-level underfill method of manufacture

Negative thermal expansion system (NTEs) device for TCE compensation in elastomer compsites and conductive elastomer interconnects in microelectronic packaging

A reworkable thermoset epoxy-containing material that allows for a reworkable assembly such as a reworkable waferlevel underfilled microelectronic package. A method for using the reworkable thermoset material in the formation of a microelectronic package using this material.

Underfilling with acid-cleavable acetal and ketal epoxy oligomers

A process and system for determining alignment data for partially obscured features on wafers or chips when a wafer or chip is substantially coated by an over bump applied material, e.g. a resin or film, and using that data to align the wafers or chips for subsequent operations such as dicing or joining. Position data for alignment is produced by identifying a location of an at least partially obscured feature by varying the depth of focus upon a work piece to determine an SNR approximating a maximum value from an image captured by optical scanning. An SNR above a threshold value can be employed.

Method and system for collecting alignment data from coated chips or wafers

An integrated circuit and methods of forming and using the integrated circuit. The circuit includes: a radiation-emitting layer over a selected region of a top surface of an integrated circuit chip, the radiation emitting layer comprising a first polymer or resin and a first radioactive material, the region smaller than a whole of the top surface of the integrated circuit chip, the region including a circuit that is liable to temporary failure when struck by radiation generated by the first radioactive material.

Discrete placement of radiation sources on integrated circuit devices

A Negative Thermal Expansion system (NTEs) device for TCE compensation or CTE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging. One aspect of the present invention provides a method for fabricating micromachine devices that have negative thermal expansion coefficients that can be made into a composite for manipulation of the TCE of the material. These devices and composites made with these devices are in the categories of materials called 'smart materials' or 'responsive materials.' Another aspect of the present invention provides microdevices comprised of dual opposed bilayers of material where the two bilayers are attached to one another at the peripheral edges only, and where the bilayers themselves are at a minimum stress conditions at a reference temperature defined by the temperature at which the bilayers are formed. These devices have the technologically useful property of volumetrically expanding upon lowering of the device temperature below the reference or processing temperature.

Negative thermal expansion system (NTEs) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging

An IC device is packaged for accelerated transient particle emission by doping the underfill thereof with a transient-particle-emitting material having a predetermined, substantially constant emission rate. The emission rate may be tunable. In one aspect, a radioactive adhesive composition is provided for bonding a semiconductor device to a chip carrier. The radioactive adhesive composition is made from a cured reaction product including a resin and a filler, and may be reworkable or non-reworkable. Either the resin or the filler, individually or both together as a mix, are doped substantially uniformly with the transient-particle-emitting material, thereby putting the transient-particle-emitting in close proximity with the IC to be tested. The underfill is formulated to have a stable chemistry, and the doped particles are encapsulated, so as to contain the emissions. Accelerated transient-particle-emission testing may then be performed on the IC in situ to provide accelerated detection of soft errors.

Packaging integrated circuits for accelerated detection of transient particle induced soft error rates

The present invention is a thermal interface for coupling a heat source to a heat sink. One embodiment of the invention comprises a mesh and a liquid, e.g., a thermally conductive liquid, disposed in the mesh. The mesh and the thermally conductive liquid are adapted to contact both the heat source and the heat sink when disposed therebetween. In one embodiment, the mesh may comprise a metal or organic material compatible with the liquid. In one embodiment, the liquid may comprise liquid metal. For example, the liquid may comprise a gallium indium tin alloy. A gasket may optionally be used to seal the mesh and the liquid between the heat source and the heat sink. In one embodiment, the heat source is an integrated circuit chip.

Heterogeneous thermal interface for cooling

A thermal interface for IC chip cooling is provided. One embodiment of the thermal interface includes a thermally conductive liquid or paste-like metal(s) disposed within a flexible, thermally conductive enclosure. The enclosure is adapted to be placed between an IC chip and a heat sink to enhance heat transfer from the chip to the heat sink, thereby enabling quicker and more efficient cooling of the chip than can be achieved by conventional techniques. In several embodiments, the thermal interface is held in place by mechanical pressure rather than by bonding, which further facilitates inspection and repair of the IC device.

Method and apparatus for chip-cooling

Methods for fabricating microelectronic interconnection structures as well as the structures formed by the methods are disclosed which improve the manufacturing throughput for assembling flip chip semiconductor devices. The use of a bilayer of polymeric materials applied on the wafer prior to dicing eliminates the need for dispensing and curing underfill for each semiconductor at the package level, thereby improving manufacturing throughput and reducing cost.

Bilayer wafer-level underfill

Reworkable thermoset acid-cleavable acetal and ketal based epoxy oligomers can be B-staged into a tack free state. Compositions containing the epoxy oligomers are employed in a reworkable assembly such as a wafer-level underfilled microelectronic package.

Acid-cleavable acetal and ketal based epoxy oligomers

Growing community of inventors

Yalesville, CT, United States of America

Nancy C LaBianca