Innogrit Technologies Co., Ltd.

Moyang Chen

Zining Wu

Yan Chen

Tao Wei

This application provides a method for instruction transmission for memory devices and a storage system. The method includes: screening instruction flow in a controller to be sent to memory devices by using a command match template and an address match template; grouping these instructions without address into a first instruction pool and these instructions with address into a second instruction pool; address screening for the second instruction pool to determine whether there are instructions that can be broadcast in a merged manner in the second instruction pool; when it is determined that the state of the memory device meets requirement and there are instructions that can be broadcast in a merged manner in the first instruction pool and/or the second instruction pool, simultaneously parallel-transmitting the instructions to corresponding memory devices. The application can save address/command time consumption and release more bandwidth for data transmission.

Method for instruction transmission for memory devices and storage system

The present disclosure relates to methods and systems for evaluating a storage medium. The method may include receiving, via a user interface of a host, a user request to evaluate a storage medium coupled to a first controller. The method may also include determining whether there is a first binding history table associated with the storage medium stored in the host. In response to a determination that there is no first binding history table stored in the host, the method may include retrieving a binding history table from the storage medium via the first controller and determining the storage medium as a second-hand storage medium if there is at least one second controller different from the first controller in the binding history table.

Systems and methods for evaluating a storage medium

The present disclosure describes a security device including: a hardware-based data reading circuitry that acquires, through hardware-level interaction, security data source based on a software unreadable register; and a first security data generator that generates first security data based on the security data source. Furthermore, the present disclosure also describes a security device including: a second security data generator that generates second security data; and a hardware-based data writing circuitry that writes, through hardware-level interaction, the second security data into a software unreadable register.

Security data generation based upon software unreadable registers

A chip fingerprint management device includes: a one-time programmable (OTP) memory including a first storage region, the first storage region being readable by hardware and access restricted by software; and an OTP controller which generates a chip fingerprint based on a random number, and programs the generated chip fingerprint into the first storage region in the OTP memory.

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Shanghai, China

Moyang Chen