Luminescent Technologies, Inc.

Kla-Tencor Technologies Corporation

Globalfoundries Inc.

Asml Netherlands B.v.

Kla Tencor Corporation

Kla Corporation

Brion Technologies, Inc.

Moshe E Preil

Alex N Hegyi

Daniel S Abrams

Jun Ye

Gerard M Schmid

James Norman Wiley

Shauh-Teh Juang

Ji Xu

Xun Chen

Michael E Adel

Mark Ghinovker

Chris Mack

Lance Glasser

Richard Farrell

John Joseph Biafore

Jason Cantone

Michael J Gassner

Richad A Farrell

Yu Long Cao

Christopher F Bevis

Stefan Hunsche

Azat M Latypov

Allen Park

Kevin M Monahan

Tamer Coskun

John Charles Robinson

Gaurav Verma

Carl Hess

Thomas Ingolf Wallow

Yalin Xiong

Frank Chilese

Boris Golovanevsky

Zain Saidin

Robert Haynes

Pavel Izikson

Sagar A Kekare

Andrew Cross

Ingrid B Peterson

Jorge Poplawski

Elyakim Kassel

Ben Tsai

Alessandro Vaglio Pret

A system for stochastic reticle defect dispositioning is disclosed. The system includes a controller including one or more processors and memory. The one or more processors configured to acquire product metrology data of a product reticle. The one or more processors configured to perform one or more stochastic simulations based on the product metrology data to generate one or more simulated product samples including the pattern of elements. The one or more processors configured to generate a product model of the product reticle modeling the printing process of the pattern of elements by the product reticle. The one or more processors configured to identify at least one of a care area of the product reticle which is susceptible to printing stochastic defects on product samples, or a care area on the one or more simulated product samples which is susceptible to printed stochastic defects based on the product model.

Stochastic reticle defect dispositioning

A multi-column assembly for a scanning electron microscopy (SEM) system is disclosed. The multi-column assembly includes a plurality of electron-optical columns arranged in an array defined by one or more spacings. Each electron-optical column includes one or more electron-optical elements. The plurality of electron-optical columns is configured to characterize one or more field areas on a surface of a sample secured on a stage. The number of electron-optical columns in the plurality of electron-optical columns equals an integer number of inspection areas in a field area of the one or more field areas. The one or more spacings of the plurality of electron-optical columns correspond to one or more dimensions of the inspection areas.

Multi-column spacing for photomask and reticle inspection and wafer print check verification

A system for stochastically-aware metrology includes a controller to be communicatively coupled to a fabrication tool. The controller receives a production recipe including at least a pattern of elements to be fabricated on a sample and one or more exposure parameters for exposing the pattern of elements, identifies candidate care areas of the pattern of elements susceptible to stochastic repeaters including fabrication defects predicted to occur stochastically when fabricated according to the production recipe, selects one or more care areas from the candidate care areas by comparing one or more predicted likelihoods of the one or more stochastic repeaters to a defect likelihood threshold, modifies the production recipe to mitigate the stochastic repeaters within the one or more care areas within a selected tolerance, and directs the fabrication tool to fabricate at least one sample according to the modified production recipe.

Stochastically-aware metrology and fabrication

A system, method, and computer program product are provided for systematic and stochastic characterization of pattern defects identified from a fabricated component. In use, a plurality of pattern defects detected from a fabricated component are identified. Additionally, attributes of each of the pattern defects are analyzed, based on predefined criteria. Further, a first set of pattern defects of the plurality of pattern defects are determined, from the analysis, to be systematic pattern defects, and a second set of pattern defects of the plurality of pattern defects are determined, from the analysis, to be stochastic pattern defects. Moreover, a first action is performed for the determined systematic pattern defects and a second action is performed for the determined stochastic pattern defects.

System, method and computer program product for systematic and stochastic characterization of pattern defects identified from a semiconductor wafer

Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a substantially periodic array of a plurality of topographical features including a plurality of etch resistant topographical features and at least one graphoepitaxy feature. The plurality of etch resistant topographical features define a plurality of etch resistant confinement wells and the at least one graphoepitaxy feature defines a graphoepitaxy confinement well that has a different size and/or shape than the etch resistant confinement wells. A block copolymer is deposited into the confinement wells. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The etch resistant topographical features direct the etch resistant phase to form an etch resistant plug in each of the etch resistant confinement wells.

Methods for fabricating integrated circuits using directed self-assembly including a substantially periodic array of topographical features that includes etch resistant topographical features for transferability control

In one example, a method includes forming a template having a plurality of elements above a process layer and forming spacers on sidewalls of the plurality of elements. Portions of the process layer are exposed between adjacent spacers. At least one of the plurality of elements is removed. A mask structure is formed from a directed self-assembly material over the exposed portions. The process layer is patterned using at least the mask structure as an etch mask.

Sidewall image templates for directed self-assembly materials

Various computer-implemented methods are provided. One method includes determining errors across a field of a lens of a lithography system based on wafer measurements. In addition, the method includes separating the errors into correctable and non-correctable errors across the field. The errors may include dose errors, focus errors, or dose and focus errors. In another embodiment, the method may include determining correction terms for parameter(s) of the lithography system, which if applied to the parameter(s), the correctable errors would be eliminated resulting in approximately optimal imaging performance of the lithography system. Another method includes controlling one or more parameters of features within substantially an entire printed area on a product wafer using a limited number of wafer measurements performed on a test wafer. The wafer measurements may be performed on a first feature type, and the features that are controlled may include a second, different feature type.

Methods for improved monitor and control of lithography processes

A method includes forming a template having a plurality of elements above a process layer, wherein portions of the process layer are exposed between adjacent elements of the template. A directed self-assembly layer is formed over the exposed portions. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer. Non-periodic elements are defined in the process later by the template and periodic elements are defined in the process layer by the etch-resistant components of the directed self-assembly layer.

Asymmetric templates for forming non-periodic patterns using directed self-assembly materials

Approaches for utilizing laser annealing to optimize lithographic processes such as directed self assembly (DSA) are provided. Under a typical approach, a substrate (e.g., a wafer) will be subjected to a lithographic process (e.g., having a set of stages/phases, aspects, etc.) such as DSA. Before or during such process, a set of laser annealing passes/scans will be made over the substrate to optimize one or more of the stages. In addition, the substrate could be subjected to additional processes such as hotplate annealing, etc. Still yet, in making a series of laser annealing passes, the techniques utilized and/or beam characteristics of each pass could be varied to further optimize the results.

Optimizing lithographic processes using laser annealing techniques

A method includes forming a chemical guide layer above a process layer. A template having a plurality of elements is formed above the process layer. The chemical guide layer is disposed on at least portions of the process layer disposed between adjacent elements of the template. A directed self-assembly layer is formed over the chemical guide layer. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer as an etch mask.

Chemical and physical templates for forming patterns using directed self-assembly materials

A system receives a mask pattern and a first image of at least a portion of a photo-mask corresponding to the mask pattern. The system determines a second image of at least the portion of the photo-mask based on the first image and the mask pattern. This second image is characterized by additional spatial frequencies than the first image.

Photo-mask and wafer image reconstruction

A method for identifying process window signature patterns in a device area of a mask is disclosed. The signature patterns collectively provide a unique response to changes in a set of process condition parameters to the lithography process. The signature patterns enable monitoring of associated process condition parameters for signs of process drift, analyzing of the process condition parameters to determine which are limiting and affecting the chip yields, analyzing the changes in the process condition parameters to determine the corrections that should be fed back into the lithography process or forwarded to an etch process, identifying specific masks that do not transfer the intended pattern to wafers as intended, and identifying groups of masks that share common characteristics and behave in a similar manner with respect to changes in process condition parameters when transferring the pattern to the wafer.

Process window signature patterns for lithography process control

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Sunnyvale, CA, United States of America

Moshe E Preil