Semiconductor Components Industries, LLC

Lattice Semiconductor Corporation

Moshe Agam

Johan Camiel Julia Janssens

Thierry Coffi Herve Yao

Jaroslav Pjencak

Agajan Suwhanov

Bruce Greenwood

Sallie Hose

Jaroslav Pjencák

Gary Horst Loechelt

Weize Chen

Mark Griswold

Thierry Yao

Ladislav Seliga

Shizen Skip Liu

Ravindar Mohan Lall

Mayank Gupta

Matthew Comard

Skip Shizhen Liu

Kazi Habib

Rick Smoak

A semiconductor device may include a Silicon on Insulator (SOI) substrate, and a diode formed on the SOI substrate, the diode including a cathode region and an anode region. The semiconductor device may include at least one breakdown voltage trench disposed at an edge of the cathode region, and between the cathode region and the anode region.

High voltage diode on SOI substrate with trench-modified current path

Systems and methods of the disclosed embodiments include a semiconductor device having a semiconductor substrate. The semiconductor substrate has a first major surface, an opposing second major surface, a first doped region of a first conductivity type disposed beneath the first major surface, and a semiconductor region of the first conductivity type disposed between the first doped region and the second major surface. The semiconductor device may also include a trench isolation structure, comprising a conductive trench filling enclosed by an insulating trench liner. The trench isolation structure extends from the first major surface through the first doped region and into the semiconductor region. The semiconductor device may also include a semiconductor device structure disposed with a drain structure, and a connection structure formed between the conductive trench filling of the trench isolation structure and the drain region.

Semiconductor device having optimized drain termination and method therefor

An electronic device can include a substrate defining a trench. In an embodiment, a semiconductor body can be within the trench, wherein the semiconductor body has a resistivity of at least 0.05 ohm-cm and is electrically isolated from the substrate. In an embodiment, an electronic component can be within the semiconductor body. The electronic component can be a resistor or a diode. In a particular embodiment, the semiconductor body has an upper surface, the electronic component is within and along an upper surface and spaced apart from a bottom of the semiconductor body. In a further embodiment, the electronic device can further include a first electronic component within an active region of the substrate, an isolation structure within the trench, and a second electronic component within the isolation structure.

Electronic device including a semiconductor body or an isolation structure within a trench

An electronic device can include a semiconductor layer having a primary surface, a drift region adjacent to the primary surface, a drain region adjacent to the drift region and extending deeper into the semiconductor layer as compared to the drift region, a resurf region spaced apart from the primary surface, an insulating layer overlying the drain region, and a contact extending through the insulating layer to the drain region. In an embodiment, the drain region can include a sinker region that allows a bulk breakdown to the resurf region to occur during an overvoltage event where the bulk breakdown occurs outside of the drift region, and in a particular embodiment, away from a shallow trench isolation structure or other sensitive structure.

Electronic device including a drift region

A semiconductor device includes a floating buried doped region, a first doped region disposed between the floating buried doped region and a first major surface, and a semiconductor region disposed between the floating buried doped region and a second major surface. Trench isolation portions extend from the first major surface and terminate within the semiconductor region to define an active region. An insulated trench structure is laterally disposed between the trench isolation portions, terminates within the floating buried doped region, and defines a first portion and a second portion of the active region. A biasing semiconductor device is within the first portion, and a functional semiconductor device is within the second portion. The biasing semiconductor device is adapted to set a potential of the floating buried doped region and adapted to divert parasitic currents away from the functional semiconductor device.

Semiconductor device having biasing structure for self-isolating buried layer and method therefor

In an aspect, a circuit can include a first transistor, wherein an emitter is coupled to an emitter terminal, and a base is coupled to a base terminal; a second transistor, wherein the collector is coupled to a substrate terminal, and a base is coupled to the collector of the first transistor; and a component having a rectifying junction, wherein a first terminal is coupled to the collector of the first transistor, and a second terminal is coupled to the collector terminal of the circuit. In another aspect, an electronic device can include a substrate having a first semiconductor region; a second semiconductor region; and a third semiconductor region; a first trench isolation structure extending from a major surface through the third semiconductor region and terminating within the second semiconductor region; and an emitter region coupled to an emitter terminal of the electronic device.

Circuit and an electronic device including a transistor and a component and a process of forming the same

A semiconductor device includes a floating buried doped region, a first doped region disposed between the floating buried doped region and a first major surface, and a semiconductor region disposed between the floating buried doped region and a second major surface. A trench isolation structure extends from the first major surface and terminates within the semiconductor region and the floating buried doped region abuts the trench isolation structure. A second doped region is disposed in the first doped region has an opposite conductivity type to the first doped region. A first isolation device is disposed in the first doped region and is configured to divert current injected into the semiconductor device from other regions thereby delaying the triggering of an internal SCR structure. In one embodiment, a second isolation structure is disposed within the first doped region and is configured to disrupt a leakage path along a sidewall surface of the trench isolation structure.

Isolation structure for semiconductor device having self-biasing buried layer and method therefor

Process of forming an electronic device including a drift region, a sinker region and a resurf region

In one embodiment, a method of forming a semiconductor device may include forming a buried region within a semiconductor region, including forming an opening in the buried region. The method may also include forming a drift region of a second conductivity type in the semiconductor region with at least a portion of the drift region overlying a first portion of the buried region. Another portion of the method may include forming a first drain region of the second conductivity type in the drift region wherein the first drain region does not overlie the buried region.

Method of forming a semiconductor device

An electronic device can include a semiconductor layer having a primary surface, and an isolation structure. The isolation structure can include a first well region within the semiconductor layer and having a first conductivity, a second well region within the semiconductor layer and having a second conductivity type opposite the first conductivity type, and a third well region within the semiconductor layer having the first conductivity type. The second well region can be disposed between the first and third well regions. The first, second, and third well regions can be electrically connected to one another. The electronic device can help to allow more electrons during an electrostatic discharge or similar event to flow where the electrons will be less problematic. A process of forming the electronic device may be implemented with changes to existing masks without adding any processing operations.

Growing community of inventors

Portland, OR, United States of America

Moshe Agam