Kabushiki Kaisha Toshiba

Mitsutoshi Koyama

Koichi Takahashi

Naoto Miyashita

Takeshi Kubota

Hironori Sonobe

Kyoichi Suguro

Keitaro Imai

Toshio Shimizu

Yoshiro Baba

Shinji Nunotani

Kikuo Yamabe

Satoshi Yanagiya

Tatsuzo Kawaguchi

According to the present invention, when a wiring layer using copper is formed, an interlayer insulation film is formed on a semiconductor substrate having a conductive portion of an element. A contact hole, which is connected to at least the conductive portion, is formed in the interlayer insulation film. A wiring groove is formed in the surface of the interlayer insulation film including a region where the contact hole is formed. A barrier metal having a tungsten carbide film on its surface is formed on the surface of the interlayer insulation film and in the wiring groove and contact hole in contact with the conductive portion. A copper film is then formed on the barrier metal in contact with the tungsten carbide film. After that, the contact hole and wiring groove are completely filled with the copper film by heat treatment. An excess portion is removed from the copper film except in the contact hole and wiring groove thereby to form a copper buried wiring layer. Thus, the copper film is formed in contact with the tungsten carbide film and the wettability of copper to the barrier metal is improved, accordingly, the copper wiring layer can be increased in reliability.

Method of making a semiconductor device having a multilayer metal film of titanium/titanium nitride/tungsten/tungsten carbide

In a method for forming a high aspect ratio structure using copper in an ultra high-speed device, the degree of copper burying is heightened. A high aspect ratio structure, such as a fine connecting hole, is formed in a layer insulating film on a silicon substrate. Then, after a CVD-TiN film is formed to have a thickness of nm on the insulating film, a copper film having a thickness of 1 &mgr;g m is formed. In this case, the highly pure copper film is formed by controlling film-forming conditions so as to set oxygen and sulfur concentrations in the film equal to a fixed level or lower. Thus, during its burying in the connecting hole, the surface diffusibility and fluidity of the copper film heated by means of laser irradiation are facilitated.

Semiconductor device with pure copper wirings and method of manufacturing a semiconductor device with pure copper wirings

In a method for forming a high aspect ratio structure using copper in an ultra high-speed device, the degree of copper burying is heightened. A high aspect ratio structure, such as a fine connecting hole, is formed in a layer insulating film on a silicon substrate. Then, after a CVD-TiN film is formed to have a thickness of 10 nm on the insulating film, a copper film having a thickness of 1 .mu.m is formed. In this case, the highly pure copper film is formed by controlling film-forming conditions so as to set oxygen and sulfur concentrations in the film equal to a fixed level or lower. Thus, during its burying in the connecting hole, the surface diffusibility and fluidity of the copper film heated by means of laser irradiation are facilitated.

Semiconductor device with pure copper wirings and method of

A chemical vapor deposition apparatus comprises a reaction chamber for annealing a silicon wafer, a transportation mechanism for transporting the silicon wafer to the reaction chamber, a detecting device for detecting temperature of the reaction chamber, and an operation control device for receiving signals corresponding to the temperature of the reaction chamber, and supplying to the transportation mechanism, other signals for preventing the silicon wafer from being transported when the temperature is 100.degree. C. or more.

Method of manufacturing annealed films

To heat treat a semiconductor substrate without forming an oxide film on the surface thereof, the method of heat treating a semiconductor substrate, comprises: a step 1 of carrying a semiconductor substrate into a heat treating chamber heated at a temperature 150.degree. C. or lower; a step 2 of heating the heat treating chamber up to about 200.degree. C. to emit moisture adhering to the semiconductor substrate; a step 3 of introducing an etching gas into the heat treating chamber to etch an oxide film formed on the surface of the semiconductor substrate; and a step 4 of raising the temperature within the heat treating chamber up to a heat treating temperature to heat treat the semiconductor substrate.

Method of treating semiconductor substrates

A dielectric insulation film consists of a metal oxide and pieces of dissimilar metal element added to the metal oxide. A positive charge number under an ionized state of the dissimilar metal element is smaller by one than that of the metal oxide. An ionic charge number of the dissimilar metal element is of a predetermined one kind. The dielectric insulation film is formed as an insulation film of capacitor of each cell of a semiconductor device according to a chemical vapor deposition (CVD) method in the process of forming cells of the semiconductor device.

High dielectric capacitor having low current leakage

A heat-treatment apparatus includes a quartz heat-treatment tube having a vertically set axis in which a heat-treatment gas is supplied from its lower portion, and a quartz cap to be mounted on an upper opening portion of the heat-treatment tube. An opening is formed in a central portion of the cap, a quartz rod is inserted through the opening along the axis of the heat-treatment tube, and semiconductor parts to be heat-treated are held by the rod. A first exhaust duct is formed in a side surface of the heat-treatment tube at a position higher than at least the semiconductor parts held by the rod and exhausts the heat-treatment gas in the heat-treatment tube. A ring-like chamber open toward the inner surface of the cap is formed in the outer circumferential surface of the heat-treatment tube in a position close to the upper opening surface, and a second exhaust duct communicates with this chamber. The chamber communicates with the opening portion formed in the cap in the outer circumferential portion of the rod and communicates with the interior of the heat-treatment tube, thereby exhausting an external air drawn from the opening together with the heat-treatment gas in the heat-treatment tube.

Vertical heat-treatment apparatus for semiconductor parts

A semiconductor device of this invention is characterized in that one element region is electrically isolated from another element region adjacent thereto by forming a groove surrounding the one element region and a distance between the groove surrounding one element region and a groove surrounding the another element region is set to be equal to or larger than 3 .mu.m.

Semiconductor device having element regions electrically isolated from

In a sputtering target supporting device for fixing, to a common electrode, a plurality of beams forming a mosaic target used for co-sputtering, at least one pressing mechanism is provided exclusively for each of the beams to press the respective beam against the common electrode by means of the respective pressing mechanism provided therefor.

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Tokyo, Japan

Mitsutoshi Koyama