Sanyo Electric Co., Ltd.

Rohm Co., Ltd.

Kanto Sanyo Semiconductors Co., Ltd.

Renesas Technology Corp.

Samsung Electronics Co., Ltd.

Kabushiki Kaisha Toshiba

Nec Corporation

Semiconductor Components Industries, LLC

Other

Fujitsu Microelectronics Limited

Fujitsu Corporation

Mitsubishi Denki Kabushiki Kaisha

Kanto Sanyo Semiconductor Co., Ltd.

Fujitsu Semiconductor Limited

Mitsuo Umemoto

Kazumasa Tanida

Akira Suzuki

Kojiro Kameyama

Yoshio Okayama

Yoshihiko Nemoto

Koujiro Kameyama

Hiroshi Terao

Masataka Hoshino

Donghan Kim

Kenji Takahashi

Inho Choi

Jae Choon Kim

Yukiharu Akiyama

Hirotoshi Kubo

Hideaki Yoshimi

Kazumi Onda

Jikho Song

Shigehito Matsumoto

Yukari Shirahata

Masamichi Yamamuro

Kazumi Horinaka

Woon-bae Kim

Seung-Duk Baek

Kang-Wook Lee

Ho-Geon Song

Sang-Sick Park

Pyoung-Wan Kim

Chang-Seong Jeon

Yung-cheol Kong

Kyong-soon Cho

Kenji c/o Kabushiki Kaisha Toshiba Takahashi

Hiroshi c/o Nec Corporation Terao

Masataka c/o Fujitsu Limited Hoshino

Provided is a body-implantable package for processing biosensed-data for wireless communication to an external device. The package includes a tube closed by a cover, therein, a chip with a strained layer affixed thereto to form a flexible laminar circuit. The cover is fitted over an open end of the tube after the laminated chip and strained layer are inserted therein. The chip is constructed of and rolled in one or more turns into a generally cylindrical shape. The strained layer is affixed to a surface of the chip automatically to cause the flexible laminar circuit to curl into a generally cylindrical shape to fit within the tube.

Package for processing sensed-data, sensed-data processor, and system for processing sensed-data

A semiconductor package comprising: a semiconductor chip; a connection pillar that is disposed adjacent to the semiconductor chip; a first heat dissipation layer disposed on the semiconductor chip; and a second heat dissipation layer disposed on the first heat dissipation layer, the second heat dissipation layer including a first protrusion extending beyond a perimeter of the semiconductor chip and extending towards the connection pillar.

Semiconductor packages with heat dissipation layers and pillars and methods for fabricating the same

A semiconductor device includes: a semiconductor substrate; a heat sink mounted on an upper surface of the semiconductor substrate; wirings formed on a lower surface of the semiconductor substrate; and the like. The heat sink is mounted on the upper surface of the semiconductor substrate, and a planar size thereof is approximately the same as that of the semiconductor substrate. Moreover, the heat sink has a thickness of 500 &#x3bc;m to 2 mm, and may be formed to be thicker than the semiconductor substrate. By using the heat sink to reinforce the substrate, a thickness of the semiconductor substrate can be reduced to, for example, about 50 &#x3bc;m. As a result, a thickness of the entire semiconductor device can be reduced.

Semiconductor device manufacturing method

A method of fabricating a semiconductor package is disclosed. The method includes disposing semiconductor chips on a support substrate, forming a protection layer covering top surfaces of the semiconductor chips, forming a molding layer covering the support substrate and the protection layer, and etching the molding layer to expose the protection layer.

Semiconductor package and method of fabricating the same

A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a pad electrode formed on a semiconductor substrate through a first insulation layer, and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein the via hole includes a first opening of which a diameter in a portion close to the pad electrode is larger than a diameter in a portion close to the back surface of the semiconductor substrate, and a second opening formed in the first insulation layer and continuing from the first opening, of which a diameter in a portion close to the pad electrode is smaller than a diameter in a portion close to the front surface of the semiconductor substrate.

Method of manufacturing semiconductor device with through hole

Semiconductor device and manufacturing method thereof

A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed.

Method of manufacturing a flip chip package and apparatus to attach a semiconductor chip used in the method

A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid-state device where a solid-state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid-state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid-state device side connection member.

Manufacturing method for semiconductor device, semiconductor device and semiconductor chip

A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid state device where a solid state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid state device side connection member.

Manufacturing method for semiconductor device

A semiconductor device production method including: the step of forming a stopper mask layer of a first metal on a semiconductor substrate, the stopper mask layer having an opening at a predetermined position thereof; the metal supplying step of supplying a second metal into the opening of the stopper mask layer to form a projection electrode of the second metal; and removing the stopper mask layer after the metal supplying step.

Semiconductor device production method and semiconductor device

Disclosed is a semiconductor device in which emitter pad electrodes connected to an active region, collector and base pad electrodes are formed on a surface of a semiconductor substrate. Furthermore, on a back surface of the semiconductor substrate, a backside electrode is formed. Moreover, the emitter pad electrodes connected to a grounding potential are connected to the backside electrode through feedthrough electrodes penetrating the semiconductor substrate in a thickness direction.

Semiconductor device and method of manufacturing the same

Provided are a high reliability stack module fabricated at low cost by using simplified processes, a card using the stack module, and a system using the stack module. In the stack module, unit substrates are stacked with respect to each other and each unit substrate includes a selection terminal. First selection lines are electrically connected to selection terminals of first unit substrates disposed in odd-number layers, pass through some of the unit substrates, and extend to a lowermost substrate of the unit substrates. Second selection lines are electrically connected to selection terminals of second unit substrates disposed in even-number layers, pass through some of the unit substrates, and extend to the lowermost substrate of the unit substrates. The selection terminal is disposed between the first selection lines and the second selection lines.

Stack module, card including the stack module, and system including the stack module

A peeling prevention layer for preventing an insulation film and a protection layer from peeling is formed in corner portions of a semiconductor device. The peeling prevention layer can increase its peeling prevention effect more when formed in a vacant space of the semiconductor device other than the corner portions, for example, between ball-shaped conductive terminals. In a cross section of the semiconductor device, the peeling prevention layer is formed on the insulation film on the back surface of the semiconductor substrate, and the protection layer formed of a solder resist or the like is formed covering the insulation film and the peeling prevention layer. The peeling prevention layer has a lamination structure of a barrier seed layer and a copper layer formed thereon when formed by an electrolytic plating method.

Method of manufacturing a semiconductor device with a peeling prevention layer

A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.

Semiconductor device with via hole of uneven width

Growing community of inventors

Gunma, Japan

Mitsuo Umemoto