Renesas Electronics Corporation

Mitsuhiro Toya

Toshinori Imai

Tsuyoshi Fujiwara

Yoshiyuki Okabe

Takeshi Saikawa

Yoshinori Kawasaki

Shunji Mori

Provided is a technology capable of reducing parasitic capacitance of a capacitor while reducing the space occupied by the capacitor. A stacked structure is obtained by forming, over a capacitor composed of a lower electrode, a capacitor insulating film and an intermediate electrode, another capacitor composed of the intermediate electrode, another capacitor insulating film and an upper electrode. Since the intermediate electrode has a step difference, each of the distance between the intermediate electrode and lower electrode and the distance between the intermediate electrode and upper electrode in a region other than the capacitor formation region becomes greater than that in the capacitor formation region. For example, the lower electrode is brought into direct contact with the capacitor insulating film in the capacitor formation region, while the lower electrode is not brought into direct contact with the capacitor insulating film in the region other than the capacitor formation region.

Growing community of inventors

Tokyo, Japan

Mitsuhiro Toya