Macronix International Co., Ltd.

Min-Ta Wu

Erh-Kun Lai

Yen-Hao Shih

Kuang Yeu Hsieh

Jung-Yu Hsieh

Hang-Ting Lue

Shih-Chin Lee

Shin-Chin Lee

Memory cells comprising: a semiconductor substrate having at least two source/drain regions separated by a channel region; a charge-trapping structure disposed above the channel region; and a gate disposed above the charge-trapping structure; wherein the charge-trapping structure comprises a bottom insulating layer, a first charge-trapping layer, and a second charge-trapping layer, wherein an interface between the bottom insulating layer and the substrate has a hydrogen concentration of less than about 3&#xd7;10/cm, and methods for forming such memory cells.

Methods of forming low hydrogen concentration charge-trapping layer structures for non-volatile memory

Low hydrogen concentration charge-trapping layer structures for non-volatile memory

A semiconductor device includes a semiconductor substrate having a first conductivity type. The semiconductor substrate includes a first diffusion region having the first conductivity type, a second diffusion region having the first conductivity type, and a channel region between the first diffusion region and the second diffusion region. The device further includes a control gate over the channel region and at least one sub-gate over the first and second diffusion regions.

Non-volatile memory device having improved band-to-band tunneling induced hot electron injection efficiency and manufacturing method thereof

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Tainan, Taiwan

Min-Ta Wu