Samsung Electronics Co., Ltd.

Min Jun Bae

Jong Youn Kim

Jin-Woo Park

Dong Kyu Kim

Jung Ho Park

Seok Pil Lee

Gwang Jae Jeon

A semiconductor package includes a redistribution substrate having first and second surfaces opposed to each other, and including an insulation member, a plurality of redistribution layers on different levels in the insulation member, and a redistribution via having a shape narrowing from the second surface toward the first surface in a first direction; a plurality of UBM layers, each including a UBM pad on the first surface of the redistribution substrate, and a UBM via having a shape narrowing in a second direction, opposite to the first direction; and at least one semiconductor chip on the second surface of the redistribution substrate, and having a plurality of contact pads electrically connected to the redistribution layer adjacent to the second surface among the plurality of redistribution layers.

Semiconductor package

A semiconductor package includes a first redistribution layer. A plurality of posts is disposed on the first redistribution layer. A semiconductor chip is disposed on the first redistribution layer between the plurality of posts. A second redistribution layer is formed on the plurality of posts and the semiconductor chip. A first memory stack is disposed on the second redistribution layer. A height of each of the plurality of posts extends from an upper surface of the first redistribution layer to a lower surface of the second redistribution layer.

Semiconductor package and method for fabricating the same

A semiconductor package includes a first semiconductor chip including a first surface and a second surface which face each other, an alignment pattern formed on the first surface, a first redistribution layer arranged on the first surface of the first semiconductor chip, a second redistribution layer arranged on the second surface of the first semiconductor chip, and electrically connected with the semiconductor chip, and a first dielectric layer including the alignment pattern between the first redistribution layer and the semiconductor chip, the alignment pattern overlapping the first surface of the first semiconductor chip.

Growing community of inventors

Yongin-si, South Korea

Min Jun Bae