Taiwan Semiconductor Manufacturing Comp. Ltd.

Mill-Jer Wang

Hung-Chih Lin

Hao Chen

Ching-Nen Peng

Sen-Kuei Hsu

Kuo-Chuan Liu

Sandeep Kumar Goel

Tang-Jung Chiu

Chi-Chang Lai

Yun-Han Lee

Chung-Sheng Yuan

Wei-Hsun Lin

Mincent Lee

Shin-Puu Jeng

Shuo-Mao Chen

Feng-Cheng Hsu

Chin-Chou Liu

Chih-Hsien Lin

Ching-Fang Chen

Chen-Hua Lin

Chao-Hsiang Yang

Chao-Yang Yeh

Ming-Cheng Hsu

Cheng-Yi Hong

Dai-Jang Chen

Chuan-Ching Wang

Chung-Han Huang

De-Jian Liu

Mirng-Ji Lii

Hsiang-Tai Lu

Chia-Heng Tsai

Chih-Chia Chen

Clinton Chih-Chieh Chao

Chun-Hsing Chen

Kai-Yi Tang

Weii Liao

Ching Nen Peng

Hao Cheng

Fei-Chieh Yang

Sheng-Hsi Huang

Chen-Shien Chen

Chewn-Pu Jou

Huan-Neng Chen

Han-Ping Pu

You-Hua Chou

Feng Wei Kuo

Wen-Yi Lin

Chien-Chen Li

Chun-Cheng Chen

Chi-Che Wu

Meng-lin Chung

Ming-Chieh Liu

Tsung-Hsiung Li

Tan-Li Chou

Chuan-Hsiang Sun

Hsiang-tai Lu

Shang-Ju Lee

Tom Chen

Pi-Huang Lee

Hsien-Tang Wang

Weil Liao

Chen-Hsiang Hsu

Wen-Wen Hsieh

Chen-Hung Tien

Chang Chia How

Kuang Kai Yen

Jeff Wang

Feynmann Chu

A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.

Semiconductor structure and manufacturing method thereof

A testing device for testing an antenna is provided. The testing device includes a housing, an antenna module for holding the antenna and disposed under the housing, and a receiving module disposed on the housing. The antenna module includes a base and a flexible film disposed on the base. The receiving module includes a substrate, a coupling radiation element disposed on the substrate and a support disposed on the substrate and having an opening. The antenna is partially exposed from the opening.

Antenna testing device for high frequency antennas

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and multiple first conductive lines over the semiconductor substrate. The first conductive lines are not electrically connected to each other. The semiconductor device structure also includes multiple first magnetic structures wrapped around portions of the first conductive lines and multiple second conductive lines over the semiconductor substrate. The second conductive lines are electrically connected in series. The semiconductor device structure further includes multiple second magnetic structures wrapped around portions of the second conductive lines. A size of each of the second magnetic structures and a size of each of the first magnetic structures are substantially the same.

Semiconductor device structure with magnetic element

A probe head structure is provided. The probe head structure includes a flexible substrate having a top surface and a bottom surface. The probe head structure includes a first probe pillar passing through the flexible substrate. The first probe pillar has a first protruding portion protruding from the bottom surface. The probe head structure includes a redistribution structure on the top surface of the flexible substrate and the first probe pillar. The redistribution structure is in direct contact with the flexible substrate and the first probe pillar. The redistribution structure includes a dielectric structure and a wiring structure in the dielectric structure. The wiring structure is electrically connected to the first probe pillar. The probe head structure includes a wiring substrate over the redistribution structure. The probe head structure includes a first conductive bump connected between the wiring substrate and the redistribution structure.

Method for forming probe head structure

A testing module for a semiconductor wafer-form package includes a circuit board structure, first connectors, a first connecting structure, second connectors, third connectors and a first bridge connector. The circuit board structure includes two edge regions and a main region located therebetween. The first connectors are located over the edge regions and connected to the circuit board structure. The first connecting structure is located over and distant from the circuit board structure. The second connectors and third connectors are located over and connected to the first connecting structure, where the third connectors are configured to transmit electric signals for testing the semiconductor wafer-form package being placed over the main region. The first bridge connector is electrically coupling the circuit board structure and the first connecting structure by connecting the second connectors and the first connectors.

Testing module and testing method using the same

A method of manufacturing a semiconductor structure forming a redistribution layer (RDL); forming a conductive pad over the RDL; performing a first electrical test through the conductive pad; bonding a first die over the RDL by a connector; disposing a first underfill material to surround the connector; performing a second electrical test through the conductive pad; disposing a second die over the first die and the conductive pad; and disposing a second underfill material to surround the second die, wherein the conductive pad is at least partially in contact with the second underfill material, and is protruded from the RDL during the first electrical test and the second electrical test.

A method that is disclosed that includes the operations outlined below. Dies are arranged on a test fixture, and each of the dies includes first antennas and at least one via array, wherein the at least one via array is formed between at least two of the first antennas to separate the first antennas. By the first antennas of the dies, test processes are sequentially performed on an under-test device including second antennas that positionally correspond to the first antennas, according to signal transmissions between the first antennas and the second antennas.

Test circuit and method

A testing device for testing an antenna is provided. The testing device includes a housing, an antenna module, and a receiving module. The antenna module is used for holding the antenna and disposed on the housing, wherein the antenna is coupled to an antenna testing apparatus. The receiving module is disposed on the housing and includes a coupling radiation element physically separated from the antenna, wherein the receiving module is configured to receive an excited signal emitted from the antenna.

Antenna testing device and method for high frequency antennas

A circuit probe includes a shielding probe having a base and a conductive probe ring on the base. A shielding cage is attached to the conductive probe ring and has an interior. The shielding cage is configured to be positioned to contain in the interior of the shielding cage at least one integrated circuit formed on a wafer, and to provide electromagnetic shielding of the at least one integrated circuit during testing of the at least one integrated circuit.

Electromagnetic shielding during wafer stage testing

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first magnetic element and a second magnetic element over the semiconductor substrate. The semiconductor device structure also includes a first conductive line extending exceeding an edge of the first magnetic element. The semiconductor device structure further includes a second conductive line extending exceeding an edge of the second magnetic element. The second conductive line is electrically connected to the first conductive line.

A testing probe structure for wafer level testing semiconductor IC packaged devices under test (DUT). The structure includes a substrate, through substrate vias, a bump array formed on a first surface of the substrate for engaging a probe card, and at least one probing unit on a second surface of the substrate. The probing unit includes a conductive probe pad formed on one surface of the substrate and at least one microbump interconnected to the pad. The pads are electrically coupled to the bump array through the vias. Some embodiments include a plurality of microbumps associated with the pad which are configured to engage a mating array of microbumps on the DUT. In some embodiments, the DUT may be probed by applying test signals from a probe card through the bump and microbump arrays without direct probing of the DUT microbumps.

Test probing structure

A testing holder for a chip unit, a multi site holding frame for plural chip units and a method for testing a die thereof are provided. The proposed multi site holding frame for testing plural chip units simultaneously includes a first holder frame having a plurality of testing holders. Each of the plurality of testing holders includes a holder body containing a specific one of the plural chip units, and a pressure releasing device formed on the holder body to release an insertion pressure when the specific one of the plural chip units is inserted in the holder body.

Testing holders for chip unit and die package

Growing community of inventors

Hsinchu, Taiwan

Mill-Jer Wang