Qualcomm Incorporated

Miguel Miranda Corbalan

Xia Li

Bin Yang

Stanley Seungchul Song

Vidhya Ramachandran

Gengming Tao

Irfan Anwar Khan

Shree Krishna Pandey

Biancun Xie

A three-dimensional (3D) integrated circuit (IC) includes a first die. The first die includes a 3D stacked capacitor on a first surface of the first die and coupled to a power distribution network (PDN) of the first die. The 3D IC also includes a second die stacked on the first surface of the first die, proximate the 3D stacked capacitor on the first surface of the first die. The 3D IC further includes active circuitry coupled to the 3D stacked capacitor through the PDN of the first die.

Three-dimensional integrated circuit (3D IC) power distribution network (PDN) capacitor integration

A heterojunction bipolar transistor unit cell may include a compound semiconductor substrate. The heterojunction bipolar transistor unity may also include a base mesa on the compound semiconductor substrate. The base mesa may include a collector region on the compound semiconductor substrate and a base region on the collector region. The heterojunction bipolar transistor unity may further include a single emitter mesa on the base mesa.

Heterojunction bipolar transistor unit cell and power stage for a power amplifier

An apparatus includes a substrate and an interposer associated with the substrate. The apparatus further includes a first device disposed within the substrate or within the interposer and a second device disposed within the interposer. The first device and the second device are arranged in a stacked configuration.

Interposer having stacked devices

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San Diego, CA, United States of America

Miguel Miranda Corbalan