International Business Machines Corporation

Tokyo Electron Limited

Michael Ray Sievers

Richard Stephan Wise

Kaushik Arun Kumar

Siddhartha Panda

Steven B Herschbein

Andres Fernando Munoz

Chad Rue

Richard Stephen Wise

Judson Robert Holt

Wesley Charles Natzle

Huajie Chen

Rangarajan Jagannathan

Lee Chen

Herschel M Marchman

Narender N Rana

Carmelo F Scrudato

Aaron D Shore

Ville S Kiiskinen

A semiconductor structure fabrication method. A provided structure includes: a semiconductor substrate, a transistor on the semiconductor substrate, N interconnect layers on the semiconductor substrate, and a temporary filling region within the N layers. N is at least 2. The temporary filling region is heated at a high temperature sufficiently high to result in the temporary filling material being replaced by a cooling pipes system that does not include any solid or liquid material. A first portion and a second portion of the cooling pipes system are each in direct physical contact with a surrounding ambient at a first interface and a second interface respectively such that a first direction perpendicular to the first interface is perpendicular to a second direction perpendicular to the second interface. A totality of interfaces between the cooling pipes system and the ambient consists of the first interface and the second interface.

On-chip cooling for integrated circuits

Structures and methods for forming the same. A semiconductor chip includes a substrate and a transistor. The chip includes N interconnect layers on the substrate, N being a positive integer. The chip includes a cooling pipes system inside the N interconnect layers. The cooling pipes system does not include any solid or liquid material. Given any first point and any second point in the cooling pipes system, there exists a continuous path which connects the first and second points and which is totally within the cooling pipes system. A first portion of the cooling pipes system overlaps the transistor. A second portion of the cooling pipes system is higher than the substrate and lower than a top interconnect layer. The second portion is in direct physical contact with a surrounding ambient.

On-chip cooling systems for integrated circuits

A technique is described whereby temperature gradients are created within a semiconductor wafer. Temperature sensitive etching and/or deposition processes are then employed. These temperature sensitive processes proceed at different rates in regions with different temperatures. To reduce pinch off in etching processes, a temperature sensitive etch process is selected and a temperature gradient is created between the surface and subsurface of a wafer such that the etching process proceeds more slowly at the surface than deeper in the wafer. This reduces 'crusting' of solid reaction products at trench openings, thereby eliminating pinch off in many cases. Similar temperature-sensitive deposition processes can be employed to produce void-free high aspect ratio conductors and trench fills.

Thermal gradient control of high aspect ratio etching and deposition processes

Disclosed are embodiments of a MOSFET with defined halos that are bound to defined source/drain extensions and a method of forming the MOSFET. A semiconductor layer is etched to form recesses that undercut a gate dielectric layer. A low energy implant forms halos. Then, a COR pre-clean is performed and the recesses are filled by epitaxial deposition. The epi can be in-situ doped or subsequently implanted to form source/drain extensions. Alternatively, the etch is immediately followed by the COR pre-clean, which is followed by epitaxial deposition to fill the recesses. During the epitaxial deposition process, the deposited material is doped to form in-situ doped halos and, then, the dopant is switched to form in-situ doped source/drain extensions adjacent to the halos. Alternatively, after the in-situ doped halos are formed the deposition process is performed without dopants and an implant is used to form source/drain extensions.

Metal oxide field effect transistor with a sharp halo

A method and apparatus for detecting the endpoint in a dry plasma etching system comprising a first electrode (e.g., upper electrode) and a second electrode (e.g., lower electrode) upon which a substrate rests is described. A direct current (DC) voltage is applied between the first electrode and a ring electrode surrounding the second electrode, and the DC current is monitored to determine the endpoint of the etching process. The DC current is affected by the impedance of the plasma, and therefore responds to many variations including, for example, the plasma density, electron/ion flux to exposed surfaces, the electron temperature, etc.

Method and apparatus for detecting endpoint in a dry etching system by monitoring a superimposed DC current

Metal oxide field effect transistor with a sharp halo and a method of forming the transistor

Photoelectron emissions are used to detect an endpoint of a thickness alteration of a topmost layer in a set of layers undergoing patterning. The set of layers are irradiated, which causes an emission of photoelectrons. Upon receipt of or absence of a photoelectron emission, patterning endpoint is detected.

Endpoint detection for the patterning of layered materials

An atomic force microscope (AFM) having a hollowed cantilever ending in a hollowed tip is described, wherein the end of the tip is immersed in a liquid. The AFM includes a gas source that provides and controls the flow of gas into the hollowed tip. The flow rate of the gas is regulated to form and sustain a static bubble at the end of the hollowed tip. The formation of the static bubble is verified optically. A gas control manifold allows an easy switch of gasses that are fed into the probe tip. The gas that is introduced acts like a chemically modified tip, and is selected to increase the deflection signal for the material of interest. The tip of the present invention is a highly versatile AFM tool that is easily adjusted to provide optimized imaging for a wide variety of materials, in contrast with standard AFMs that require a plethora of chemically modified tips to obtain equivalent results. Moreover, there is a much lower propensity for the tip to damage the sample or to be damaged from inadvertent contact with the surface of the sample.

Gas filled reactive atomic force microscope probe

A non-destructive in-situ elemental profiling of a layer in a set of layers method and system are disclosed. In one embodiment, a first emission of a plurality of photoelectrons is caused from the layer to be elementally profiled. An elemental profile of the layer is determined based on the emission. In another embodiment, a second emission of a plurality of photoelectrons is also received from the layer, and an elemental profile is determined by comparison of the resulting signals. A process that is altering the layer can then be controlled 'on-the-fly' to obtain a desired material composition. Since the method can be employed in-situ and is non-destructive, it reduces turn around time and lowers wafer consumption. The invention also records the composition of all processed wafers, hence, removing the conventional statistical sampling problem.

Non-destructive in-situ elemental profiling

Detection of weak ion currents scattered from a sample by an ion beam is improved by the use of a multiplier system in which a conversion electrode converts incident ions to a number of secondary electrons multiplied by a multiplication factor, the secondary electrons being attracted to an electron detector by an appropriate bias. In one version, the detector is a two stage system, in which the secondary electrons strike a scintillator that emits photons that are detected in a photon detector such as a photomultiplier or a CCD.

Ion detector for ion beam applications

The present invention is directed to methods for editing copper features embedded within an organic body by exposing at least a portion of a top surface of the copper feature, forming a mill box there-over and then simultaneously milling both the copper feature and any organic material exposed through the mill box in a single step using an ion beam in combination with a XeFgas for a dwell time of at least 10 milliseconds. The invention dramatically increases the efficiency of Focused Ion Beam milling of copper features embedded in organic layers by milling these features in a gas-depleted environment at significantly increased dwell time while avoiding the problems of graphitization, destruction of the organic layer and metal redeposition.

Dry etch process to edit copper lines

A method and structure for an apparatus for removing metal from an integrated circuit structure is disclosed. A container holds an integrated circuit structure that has a metal portion. An electronic device connected to the container produces an electronic field proximate to a limited region of the metal portion. A first supply connected to the container supplies an oxidizing agent within the container. A solvent supply connected to the container supplies solvent to the limited region of the metal portion.

Metal dry etch using electronic field

A process for milling copper metal from a substrate having an exposed copper surface includes absorbing a halogen gas onto the exposed copper surface to generate reaction products of copper and the halogen gas; removing unreacted halogen gas from the surface; and directing a focused ion beam onto the surface to selectively remove a portion of the surface comprising the reaction products.

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Poughkeepsie, NY, United States of America

Michael Ray Sievers