Taiwan Semiconductor Manufacturing Comp. Ltd.

Miao-Cheng Liao

Min Hao Hong

You-Hua Chou

Hsiang Hsiang Ko

Shiu-Ko JangJian

Ying-Lang Wang

Chih-Tsung Lee

Chen-Ming Huang

Jian-Shin Tsai

Kei-Wei Chen

Hsiang-Hsiang Ko

Hsiang-Sheng Cheng

Jung-Chih Tsao

Yi-Lung Cheng

Chih-Yuan Yang

Kuo-Hsien Cheng

Shao-Ta Hsu

Jinn-Kwei Liang

Min-Hao Hong

Hung-Hsin Liang

Phil Sun

Cheng-Chao Lin

Wen-Chieh Hsieh

Sheng-Te Shu

The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure.

Reverse damascene process

Methods of making an integrated circuit are disclosed. An embodiment method includes etching a trench in a silicon substrate, depositing a first layer of isolation material in the trench, the first layer of isolation material projecting above surface of the silicon substrate, capping the first layer of isolation material by depositing a second layer of isolation material, the second layer of isolation material extending along at least a portion of sidewalls of the first layer of isolation material, epitaxially-growing a silicon layer upon the silicon substrate, the silicon layer horizontally adjacent to the second layer of isolation material, and forming a gate structure on the silicon layer, the gate structure defining a channel.

Two-step shallow trench isolation (STI) process

A method for reducing dark current in image sensors comprises providing a backside illuminated image sensor wafer, depositing a first passivation layer on a backside of the backside illuminated image sensor wafer, depositing a plasma enhanced passivation layer on the first passivation layer and depositing a second passivation layer on the plasma enhanced passivation layer.

Apparatus and method for reducing dark current in image sensors

Embodiments that relate to mechanisms for providing a stable dislocation profile are provided. A semiconductor substrate having a gate stack is provided. An opening is formed adjacent to a side of the gate stack. A first part of an epitaxial growth structure is formed in the opening. A second part of the epitaxial growth structure is formed in the opening. The first part and the second part of the epitaxial growth structure are formed along different directions.

Mechanisms for forming semiconductor device having stable dislocation profile

An integrated circuit device and a process for making the integrated circuit device. The integrated circuit device including a substrate having a trench formed therein, a first layer of isolation material occupying the trench, a second layer of isolation material formed over the first layer of isolation material, an epitaxially-grown silicon layer on the substrate and horizontally adjacent the second layer of isolation material, and a gate structure formed on the epitaxially-grown silicon, the gate structure defining a channel.

A semiconductor device and method of manufacturing a semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate and forming a dielectric layer over the substrate. The method further includes forming a first trench within the dielectric layer, wherein the first trench extends through the dielectric layer and epitaxially (epi) growing a first active layer within the first trench and selectively curing with a radiation energy the dielectric layer adjacent to the first active layer.

Stressed semiconductor device and method of manufacturing

A method for forming an alpha-tantalum layer comprising disposing a nitrogen containing base layer on a semiconductor substrate, bombarding the nitrogen containing base layer with a bombarding element, thereby forming an alpha-tantalum seed layer, and sputtering a layer of tantalum on the alpha-tantalum seed layer, thereby forming a surface layer of substantially alpha-tantalum.

Alpha tantalum capacitor plate

A method for forming IMD films. A substrate is provided. A plurality of dielectric films are formed on the substrate, wherein each of the dielectric layers are deposited in-situ in one chamber with only one thermal cycle.

Method for forming IMD films

An MIM structure and method for forming the same the method including forming a bottom conductive electrode overlying a semiconducting substrate; forming a first protection layer on the conductive electrode; forming a dielectric layer on the first protection layer; and, forming an upper conductive electrode on the dielectric layer to form a metal-insulator-metal (MIM) structure.

MIM structure and fabrication process with improved capacitance reliability

A preventive maintenance tool which may be installed on a metal chemical vapor deposition (CVD) chamber to prevent escape of contaminating and toxic gases from the chamber interior during preventative maintenance (PM) cleaning of the chamber. The tool comprises a cylindrical tool body which fits to the lid O-ring of the chamber to form a gas-tight seal therewith; a vacuum line connector nipple extending from the body for connection to a vacuum line; and a lid panel rotatably mounted in the body and fitted with a pair of hinged closing panels for reversibly sealing the chamber and facilitating chamber cleaning.

Preventative maintenance aided tool for CVD chamber

A heater lift mechanism with a ball screw linear actuator provides a relatively maintenance free lift mechanism with low starting torque and high positional accuracy. The heater lift mechanism can also be used to move wafer boats in a vertical furnace. The ball screw linear actuator has substantially reduced backlash over a conventional ACME thread lead screw.

Growing community of inventors

Yunlin, Taiwan

Miao-Cheng Liao