Intel Corporation

Mengzhi Pang

Charan K Gurumurthy

John Stephen Guzek

Ravindra V Tanikella

Charavanakumara Gurumurthy

Pilin Liu

Christopher J Bahr

Yonggang Li

Electronic assemblies and solders used in electronic assemblies are described. One embodiment includes a die and a substrate, with a solder material positioned between the die and the substrate, the solder comprising at least 91 weight percent Sn, 0.4 to 1.0 weight percent Cu and at least one dopant selected from the group consisting of Ag, Bi, P, and Co. Other embodiments are described and claimed.

Solder joints with enhanced electromigration resistance

Methods of forming a microelectronic structure are described. Those methods include doping a lead free solder material with nickel, wherein the nickel comprises up to about 0.2 percent by weight of the solder material, and then applying the solder material to a substrate comprising a copper pad.

Doping of lead-free solder alloys and structures formed thereby

An electrically conductive pin comprising a pin stern and a pin head attached to the pin stem. The pin head is adapted to be mounted onto a surface of a microelectronic substrate to support the pin stem. The pin head has an underside surface defining a continuous curve configured to allow gases to escape from a pin-attach solder region adjacent the underside surface.

Pin grid array package substrate including pins having curved pin heads

According to some embodiments, a method, apparatus, and system are provided. In some embodiments, the method includes providing solder resist material on a surface of a substrate, applying mask material on top of the solder resist material, reflowing solder located in an opening formed through both the solder resist material and the mask material, and removing the mask material after the reflowing of the solder.

System, apparatus, and method for advanced solder bumping

A method of providing electrically conductive bumps on electrode pads of a microelectronic substrate, and bumped substrate formed according to the method. The method includes: providing a substrate including first electrode pads and second electrode pads thereon, the first electrode pads exhibiting a first pattern, and the second electrode pads exhibiting a second pattern different from the first pattern; attaching first solder portions to a solder delivery head according to the first pattern, and second solder portions to a solder delivery head according to the second pattern, the second solder portions being larger than the first solder portions; after attaching, releasing the first solder portions onto the first electrode pads, and the second solder portions onto the second electrode pads; after releasing, reflowing the first solder portions and second solder portions to form, respectively, first solder bumps and second solder bumps on the electrode pads.

Method of providing mixed size solder bumps on a substrate using a solder delivery head

A method of providing electrically conductive bumps on electrode pads of a microelectronic substrate, and bumped substrate formed according to the method. The method includes: providing a microelectronic substrate including electrode pads; providing a sorting mask defining first openings and second openings therethrough, the second openings being larger than the first openings; disposing the mask onto the substrate such that the first openings and second openings register with respective ones of the electrode pads; providing first solder portions onto corresponding ones of the electrode pads through the first openings, and second solder portions onto corresponding ones of the electrode pads through the second openings, the second solder portions being larger than the first solder portions; reflowing the solder portions to form, respectively first solder bumps and second solder bumps on respective ones of the electrode pads; and removing the mask after providing solder portions and before reflowing.

Method of providing solder bumps of mixed sizes on a substrate using a sorting mask and bumped substrate formed according to the method

A microelectronic package substrate and an electrically conductive pin. The substrates includes: a die-side surface adapted to receive a die thereon; a printed circuit board (PCB)-side surface adapted to be mechanically and electrically bonded to a PCB; an array of land pads on the PCB-side surface, the land pads defining anchoring recesses therein; an array of electrically conductive pins electrically and mechanically bonded to respective ones of the land pads, the pins having anchoring elements thereon mated with corresponding ones of the anchoring recesses of the land pads, the anchoring elements and anchoring recesses being configured such that a mating thereof inhibits a tilting of the pins on the land pads; and a plurality of pin-attach solder joints mechanically and electrically bonding the pins to corresponding ones of the land pads.

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Phoenix, AZ, United States of America

Mengzhi Pang