Analog Devices,inc.

The Charles Stark Draper Laboratory, Inc.

Reflection Technology, Inc.

Maurice S Karpman

Lawrence E Felton

John R Martin

Michael W Judy

Nicole S Mueller

John A Yasaitis

Colin Stephen Gormley

Jeffrey C Thompson

Andrew J Mueller

Chang-Han Yun

Michael Rickley

Charles Baab

Changhan Hobie Yun

Susan A Alie

Dipak Sengupta

Gary B Tepolt

Brian R Smith

Peter Farrell

Manolo G Mena

Andrew Meuller

Lewis Long

Kieran Nunan

Elmer S Lacsamana

William A Webster

Javier Villarreal

Allen Becker

Nicole Hablutzel

Michael Holm

Swaminathan Rajaraman

Nicholas Pizzi, Jr

Russell Berman

Matt Shea

Allyson Hartzell

Peter W Farrell

Michael P Duffy

Techniques for constructing a wafer based module are provided herein. For example, the techniques include providing a substrate, forming a pattern of conductive material relative to at least one of a surface plane of the substrate and an internal location within the substrate with the pattern of the conductive material including at least an exposed portion, mounting at least one electronic module to the exposed portion of the pattern of the conductive material, orienting the substrate orthogonal relative to a planar mounting surface such that the surface plane of the substrate is substantially orthogonal to the planar mounting surface, mounting one or more additional electronic modules on the planar mounting surface; and forming the semiconductor device by encapsulating the substrate, including the pattern of conductive material, the at least one electronic module and the one or more additional electronic modules within a mold compound.

Methods and devices for improved space utilization in wafer based modules

An electronic module assembly including a via spanning multiple layers in a wafer based module is described. The electronic module assembly can include a first layer deposited upon a substrate, a second layer deposited on a top surface of the first layer, and the via spanning multiple layers. The via can include a first bottom that is formed on a top surface of the first layer and a first sidewall that upstands from the first bottom and extending at least through the second layer.

Method and apparatus for forming multi-layered vias in sequentially fabricated circuits

An electronics module assembly is described herein that packages dies using a universal cavity wafer that is independent of electronics module design. In one embodiment, the electronics module assembly can include a cavity wafer having a single frontside cavity that extends over a majority of a frontside surface area of the cavity wafer and a plurality of fillports. The assembly can also include at least one group of dies placed in the frontside cavity and encapsulant that secures the position of the at least one group of dies relative to the cavity wafer. Further, a layer of the encapsulant can cover a backside of the cavity wafer.

Method and apparatus for using universal cavity wafer in wafer level packaging

A one or multi-die module comprises multiple dies. The module includes at least one die with a sensor having a sensing region, an encapsulation layer covering top sides of the multiple dies, and a redistribution layer (RDL) covering bottom sides of the multiple dies except for the sensing region. In embodiments, a cap is formed over the sensing region, which has at least a portion that is spaced away from a bottom side of the module. Metal connectors, such as solder balls, are formed on the redistribution layer to provide connection points to the module. This approach can be used to incorporate environmental sensor dies into multi-die modules. It utilizes RDL and openings in the RDL in order to provide robust packaging for the dies, while also allowing the sensor dies to be selectively exposed to the environment.

Reconstructed wafer based devices with embedded environmental sensors and process for making same

The present disclosure describes a closely spaced array of penetrating electrodes. In some implementations, the electrodes of the array are spaced less than 50 &#x3bc;m apart. The present disclosure also describes methods for manufacturing the closely spaced array of penetrating electrodes. In some implementations, each row of electrode of the array is manufactured in-plane and then coupled to other rows of electrodes to form an array.

Closely spaced array of penetrating electrodes

Techniques for providing a tamper mechanism for semiconductor devices are disclosed herein. The techniques include, for example, providing at least one die and at least one strain gauge, orienting the at least one strain gauge to the die, forming an encapsulated semiconductor device by encapsulating the die and each strain gauge within a mold compound to maintain respective orientation, and measuring an initial strain value for the at least one strain gauge after forming the encapsulated semiconductor device.

Devices and methods for detecting counterfeit semiconductor devices

Techniques for constructing an electronic module are provided herein. For example, the techniques include orienting at least one die having a top side (e.g., a first side), a bottom side (e.g., a second side) and one or more side walls, on a substrate with the top side of the die proximate the substrate, coating the bottom side and each of the side walls of the die with a stress buffer material, forming a reconstructed wafer by encapsulating the coated die within a mold compound, and removing the substrate to expose the top side of the die.

Method for incorporating stress sensitive chip scale components into reconstructed wafer based modules

A method for interconnecting a die on a substrate of an electronic package. The method includes the steps of forming a plurality of free-end wire bonds on the die, wherein the free-end wire bonds are upstanding from the die, and encapsulating the free-end wire bonds in an encapsulation layer. Planarizing the encapsulation layer is performed so that the free-end wire bonds are exposed for electrical connection. Interconnecting the free-end wire bonds is provided by applying an interconnection layer on the encapsulation layer.

Method for interconnecting die and substrate in an electronic package

A method for creating a high density electronic module including the steps of coupling a die to an interposer for form a chipset, mounting the chipset to a substrate, coupling a wafer to the substrate so that the chipset is within a window formed in the wafer, filling the window with encapsulant to encapsulate the chipset, removing the substrate to create a reconstructed wafer, and providing an interconnection structure on the interposer to form the high density electronic module.

Method for embedding a chipset having an intermediary interposer in high density electronic modules

Aspects and examples include electrical components and methods of forming electrical components. In one example, a method includes selecting a substrate, forming a pattern of a first conductive material on a top surface of the substrate, forming a pattern of a second conductive material on a bottom surface of the substrate, dicing the substrate into one or more die having a first diced surface and a second diced surface, securing the first diced surface of each of the one or more die to a retaining material, encapsulating the one or more die in an encapsulent to form a reconstituted wafer, and forming a pattern of a third conductive material on the second diced surface by metalizing a surface of the reconstituted wafer.

Three dimensional microelectronic components and fabrication methods for same

Bridge structures provide a surface on which to form interconnections to components through through-hole vias. The bridge structures at least partially, and preferably fully, span the gap between two wafers, and, more specifically, between a through-hole via in one wafer and a corresponding component on the other wafer. Bridge structure may be formed on the wafer having the through-hole via and/or the wafer having the component.

Interconnection of through-wafer vias using bridge structures

A method of producing a MEMS device removes the bottom side of a device wafer after its movable structure is formed. To that end, the method provides the device wafer, which has an initial bottom side. Next, the method forms the movable structure on the device wafer, and then removes substantially the entire initial bottom side of the device wafer. Removal of the entire initial bottom side effectively forms a final bottom side.

Method of producing a MEMS device

An optically transparent conductive material is disposed directly or indirectly on an inside surface of a cover material for static dissipation in an optical switching device. The optically transparent conductive material forms an electrically continuous film. The optically transparent conductive material can also be used for anti-reflection. An additional coating may be disposed directly or indirectly on an outside surface of the cover material.

Static dissipation treatments for optical package windows

A MEMS inertial sensor is secured within a premolded-type package formed, at least in part, from a low moisture permeable molding material. Consequently, such a motion detector should be capable of being produced more economically than those using ceramic packages. To those ends, the package has at least one wall (having a low moisture permeability) extending from a leadframe to form a cavity, and an isolator (with a top surface) within the cavity. The MEMS inertial sensor has a movable structure suspended above a substrate having a bottom surface. The substrate bottom surface is secured to the isolator top surface at a contact area. In illustrative embodiments, the contact area is less than the surface area of the bottom surface of the substrate. Accordingly, the isolator forms a space between at least a portion of the bottom substrate surface and the package. This space thus is free of the isolator. Moreover, due to the low moisture permeability of the package, further production steps can be avoided while ensuring that moisture does not adversely affect the MEMS inertial sensor within the cavity.

Growing community of inventors

Brookline, MA, United States of America

Maurice S Karpman