Qualcomm Incorporated

International Business Machines Corporation

Matthias Georg Gottwald

Chando Park

Seung Hyuk Kang

Kangho Lee

Jimmy Jianan Kan

Xiaochun Zhu

Alexander Reznicek

Bruce Bennett Doris

Pouya Hashemi

Chandrasekharan Kothandaraman

Yu Lu

Vladimir Machkaoutsan

Mustafa Badaroglu

Steven J Holmes

Rajiv V Joshi

Sudipto Chakraborty

Rasit Onur Topaloglu

Guohan Hu

Jonathan Zanhong Sun

Seonghoon Woo

A method of manufacturing a magnetic tunnel junction device is provided. The method includes forming an MTJ stack including a reference layer, a tunnel barrier layer formed on the reference layer, a free layer formed on the barrier layer, and a cap layer formed on the free layer. The method also includes performing ion beam etching (IBE) through each layer of the MTJ stack to form at least one MTJ pillar. The method also includes forming an isolation layer on sidewalls of at least the tunnel barrier layer, the isolation layer comprising a same material as that of the tunnel barrier layer. A combined width of the isolation layer and the tunnel barrier layer is equal to or greater than a width of at least one of the reference layer and the free layer.

Magnetoresistive random-access memory device

A true random number generator (TRNG) device having a magnetic tunnel junction (MTJ) structure coupled to a domain wall wire. The MTJ structure is formed of a free layer (FL) and a reference layer (RL) that sandwiches a tunnel barrier layer. The free layer has anisotropy energy sufficiently low to provide stochastic fluctuation in the orientation of the magnetic state of the free layer via thermal energy. The domain wall wire is coupled to the MTJ structure. The domain wall wire has a domain wall. Movement of the domain wall tunes a probability distribution of the fluctuation in the orientation of the magnetic state of the free layer. The domain wall can be moved by application of a suitable current through the wire to tune the probability distribution of 1's and 0's generated by a readout circuit of the TRNG device.

Magnetic tunnel junction based true random number generator

A within-chip magnetic field control device is formed in proximity to a Josephson Junction (JJ) structure. The within-chip magnetic field control device includes wiring structures that are located laterally adjacent to the JJ structure. In some embodiments, the magnetic field control device also includes, in addition to the wiring structures, a conductive plate that is connected to the wiring structures and is located beneath the JJ structure. Use of electrical current through the wiring structures induces, either directly or indirectly, a magnetic field into the JJ structure. The strength of the field can be modulated by the amount of current passing through the wiring structures. The magnetic field can be turned off as needed by ceasing to allow current to flow through the wiring structures.

Computing devices containing magnetic Josephson Junctions with embedded magnetic field control element

A top pinned magnetic tunnel junction (MTJ) stack containing a magnetic pinned layered structure including a second magnetic pinned layer having strong perpendicular magnetic anisotropy (PMA) is provided. In the present application, the magnetic pinned layered structure includes a crystal grain growth controlling layer located between a first magnetic pinned layer having a body centered cubic (BCC) texture and the second magnetic pinned layer. The presence of the crystal grain growth controlling layer facilitates formation of a second magnetic pinned layer having a face centered cubic (FCC) texture or a hexagonal closed packing (HCP) texture which, in turn, promotes strong PMA to the second magnetic pinned layer of the magnetic pinned layered structure.

MTJ stack containing a top magnetic pinned layer having strong perpendicular magnetic anisotropy

A magnetic tunnel junction (MTJ) stack structure having an enhanced write performance and thermal stability (i.e., retention) is provided which can be used as an element/component of a spin-transfer torque (STT) MRAM device. The improved write performance, particularly the write error rate slope as a function of write voltage (Vfrc) which is essential in defining the overdrive voltage needed to successfully write a bit at low write error floors, is provided by a MTJ stack structure in which a zirconium (Zr) cap layer is inserted between a MTJ capping layer and an etch stop layer.

MTJ capping layer structure for improved write error rate slopes and thermal stability

Fabricating a magnetoresistive random access memory (MRAM) device includes receiving a wafer structure having a first inter-layer dielectric (ILD) layer and a metal material disposed within the first ILD layer. A second ILD layer is deposited upon a top surface of the first ILD layer and the metal material. A trench is formed within the second ILD layer extending to the top surface of the metal material. A plurality of magnetic stack layers of a magnetic stack and an electrode layer are deposited within the trench. Portions of each of the magnetic stack layers of the magnetic stack and the electrode layer are removed to form a v-shaped magnetic tunnel junction (MTJ) in contact with the metal material.

Fabricating embedded magnetoresistive random access memory device with v-shaped magnetic tunnel junction profile

A top pinned magnetic tunnel junction (MTJ) stack for use in spin-transfer torque magnetoresistive random access memory (STT MRAM) is provided. The top pinned MTJ stack contains a synthetic anti-ferromagnetic magnetic free layer stack that is formed on an insulating aluminum nitride (AlN) seed layer having hexagonal symmetry. For such a top pinned MTJ stack, the symmetry requirements for the tunnel barrier layer do not conflict anymore with the symmetry requirements for strong anti-ferromagnetic exchange. Further, and compared to using only a metallic seed, the insulating AlN seed layer limits spin pumping from the magnetic free layer into the metallic seed layer and therefore lowers the switching current, while only making a small contribution to the resistance of a STT MRAM.

Top pinned MTJ stack with synthetic anti-ferromagnetic free layer and AlN seed layer

A double magnetic tunnel junction (MTJ) stack for use in spin-transfer torque magnetoresistive random access memory (STT MRAM) is provided. The double MTJ stack includes a bottom tunnel barrier layer having hexagonal symmetry and composed of AlN, a magnetic free layer stack containing a synthetic anti-ferromagnetic coupling layer, and a top tunnel barrier layer having cubic symmetry. For such a double MTJ stack, the symmetry requirements for the tunnel barrier layers do not conflict anymore with the symmetry requirements for strong anti-ferromagnetic exchange. Thus, such a double MTJ stack can be used to provide performance enhancement such as faster switching times and lower write errors to a STT MRAM.

Double MTJ stack with synthetic anti-ferromagnetic free layer and AlN bottom barrier layer

A semiconductor structure includes a seed layer and a multilayer stack of one or more multilayers disposed over the seed layer, each of the one or more multilayers including a magnetic layer and an additional layer disposed over a top surface of the magnetic layer. The additional layer includes a non-magnetic material and a dusting material. The multilayer stack provides a reference layer of a perpendicular magnetic tunnel junction stack. The magnetic layer may be formed of cobalt, the non-magnetic material may be at least one of iridium and rhodium, and the dusting material may be at least one of platinum, ruthenium, palladium, gold and nickel.

Semiconductor structure multilayers having a dusting material at an interface between a non-magnetic layer and a magnetic layer

Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure with a reduced thickness first pinned layer section provided below a first tunnel magneto-resistance (TMR) barrier layer is provided. The first pinned layer section includes one pinned layer magnetized in one magnetic orientation. In another aspect, a second pinned layer section and a second TMR barrier layer are provided above a free layer section and above the first TMR barrier layer in the MTJ. The second pinned layer is magnetized in a magnetic orientation that is anti-parallel (AP) to that of the first pinned layer section. In yet another aspect, the free layer comprises first and second heterogeneous layers separated by an anti-ferromagnetic coupling spacer, the first and second heterogeneous layers differing in their magnetic anisotropy.

Magnetic tunnel junction (MTJ) devices with heterogeneous free layer structure, particularly suited for spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM)

A material stack of a synthetic anti-ferromagnetic (SAF) reference layer of a perpendicular magnetic tunnel junction (MTJ) may include an SAF coupling layer. The material stack may also include and an amorphous spacer layer on the SAF coupling layer. The amorphous spacer layer may include an alloy or multilayer of tantalum and cobalt or tantalum and iron or cobalt and iron and tantalum. The amorphous spacer layer may also include a treated surface of the SAF coupling layer.

Ultrathin perpendicular pinned layer structure for magnetic tunneling junction devices

A double magnetic tunnel junction (DMTJ) device includes a fixed reference layer of a first magnetic material having a perpendicular magnetic anisotropy with a magnetic moment that is fixed. The device also includes a free layer of a second magnetic material having a perpendicular magnetic anisotropy with a magnetic moment that is changeable based on a current. A dynamic reference layer of a third magnetic material has an in-plane magnetic anisotropy and a changeable magnetic moment. The free layer is disposed between the fixed reference layer and the dynamic reference layer.

Double magnetic tunnel junction with dynamic reference layer

A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.

Magnetic tunnel junction (MTJ) device array

An apparatus includes a capping layer disposed on top of a free layer. The apparatus also includes a magnetic etch stop layer disposed on top of the capping layer. The capping layer and the magnetic etch stop layer are included in a spin-transfer torque magnetoresistive random access memory (STT-MRAM) magnetic tunnel junction (MTJ) device.

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Leuven, Belgium

Matthias Georg Gottwald