Taiwan Semiconductor Manufacturing Comp. Ltd.

Amberwave Systems Corporation

Matthew T Currie

Anthony J Lochtefeld

Richard Hammond

Eugene A Fitzgerald

Thomas A Langdo

Glyn Braithwaite

Richard Charles Westhoff

Christopher J Vineis

Christopher W Leitz

Mayank T Bulsara

Vicky K Yang

James Fiorenza

Zhiyuan Cheng

Dimitri A Antoniadis

Zhi-Yuan Cheng

A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.

Reacted conductive gate electrodes and methods of making the same

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Methods of forming strained-semiconductor-on-insulator device structures

Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or 'FETs') that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. A structure includes a relaxed substrate including a bulk material, a strained layer directly on the relaxed substrate, where a strain of the strained layer is not induced by the relaxed substrate, and a transistor formed on the strained layer.

Methods for forming semiconductor device structures

Dislocation pile-ups in compositionally graded semiconductor layers are reduced or eliminated, thereby leading to increased semiconductor device yield and manufacturability. This is accomplished by introducing a semiconductor layer having a plurality of threading dislocations distributed substantially uniformly across its surface as a starting layer and/or at least one intermediate layer during growth and relaxation of the compositionally graded layer. The semiconductor layer may include a seed layer disposed proximal to the surface of the semiconductor layer and having the threading dislocations uniformly distributed therein.

Semiconductor heterostructures having reduced dislocation pile-ups and related methods

DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.

Strained channel dynamic random access memory devices

Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Semiconductor-on-insulator structures facilitate the fabrication of devices, including MOSFETs that are at least partially depleted during operation and FinFETs including bilayer fins and/or crystalline oxide.

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Brookline, MA, United States of America

Matthew T Currie