International Business Machines Corporation

Matthew J Rutten

John Edward Cronin

Terrance M Wright

Robert Michael Geffken

Cuc Kim Huynh

Erick G Walton

Clifford Owen Morgan, Iii

Steven H Voldman

Michael D Potter

William Joseph Murphy

Harold G Linde

Anthony M Palagonia

Carter W Kaanta

Badih El-Kareh

Daniel Scott Vanslette

Bernadette Ann Pierson

Paul M Feeney

Douglas P Nadeau

Stephen Bruce Brodsky

David Craig Strippe

Patricia E Marmillion

Kent E Morrett

Stuart R Martin

Matthew Kilpatrick Miller

Terry J Brabazon

Anthony K Stamper

David V Horak

John J Ellis-Monaghan

Howard Smith Landis

Rosemary A Previti-Kelly

William Francis Landers

Roger W Cheek

James Albert Gilhooly

Susan L Cohen

Bette L Bergman Reuter

Sally J Yankee

Thomas R Fisher, Jr

Dean Allen Schaffer

Robert Albin Jurjevic

Susan G Bombardier

A method of forming inter-level contacts or vias between metal layers using a tungsten film deposited into the via using non-collimated sputter deposition. The sputter chamber is configured with a pressure of about 1 mTorr to about 10 mTorr with an inert gas flow of at least 25 cm/min to about 150 cm/min. Shielding inside the chamber is coated with a material, preferably, aluminum oxide, that promotes adhesion of tungsten to the shielding. An adhesion layer of titanium may be included prior to deposition of the tungsten film. Non-collimated sputter deposition increases the target to substrate distance inside the sputter chamber; reduces the heating effect associated with traditional collimated sputtering; and provides more robust diffusion barriers.

Sputtered tungsten diffusion barrier for improved interconnect robustness

A method of reducing the planarization defects produced during the manufacture of semiconductor devices. A sacrificial layer, having defects produced during a interconnection feature planarization step, is removed prior to the formation of subsequent layers to reduce the replication of unwanted defects.

Method of reducing planarization defects

A method and structure for a semiconductor chip includes a plurality of layers of interconnect metallurgy, at least one layer of deformable dielectric material over the interconnect metallurgy, at least one input/output bonding pad, and a support structure that includes a substantially rigid dielectric in a supporting relationship to the pad that avoids crushing the deformable dielectric material.

Method and structure of column interconnect

A method of forming inter-level contacts or vias between metal layers using a tungsten film deposited into the via using non-collimated sputter deposition. The sputter chamber is configured with a pressure of about 1 mTorr to about 10 mTorr with an inert gas flow of at least at least 25 cm,/min to about 150 cm,/min. Shielding inside the chamber is coated with a material, preferably, aluminum oxide, that promotes adhesion of tungsten to the shielding. An adhesion layer of titanium may be included prior to deposition of the tungsten film. Non-collimated sputter deposition increases the target to substrate distance inside the sputter chamber; reduces the heating effect associated with traditional collimated sputtering; and provides more robust diffusion barriers.

Disclosed is a method and apparatus for polishing a semiconductor wafer. This invention describes a novel in situ method for eliminating residual slurry and slurry abrasive particles on the wafer. A reactant is added to the slurry during the end of the Chemical Mechanical Polish (CMP) process to dissolve the slurry and etch the abrasive particles.

Apparatus for removing slurry particles

A method and apparatus for Chemical-Mechanical Polishing of semiconductor wafers using various formulations of high viscosity slurry.

Method and apparatus for slurry polishing

Electrically conductive studs are employed to interconnect bulk active devices and SOI devices in a semiconductor device. Also provided is a method for fabricating such devices.

Electrical contact to buried SOI structures

A precision analog metal-metal capacitor is fabricated by forming a first capacitor plate in an insulation layer by forming a trench therein, depositing metal within the trench and planarizing the device. A thin dielectric layer is then deposited and patterned over the first capacitor plate. A second insulator is then deposited over the device and discrete openings etched therein to expose the insulation layer and first metal plate. Metal is deposited within the openings and planarized, thereby forming a contact to the first metal plate and the second metal plate of the capacitor.

Precision analog metal-metal capacitor

The present invention relates to a chemical mechanical polishing (CMP) machine and method in which at least one polishing device is provided with a vertically-oriented polishing surface and a slurry delivery mechanism. As a result, the footprint of the machine is greatly reduced and the prevention of contaminants embedding in the polishing device can be promoted.

Vertical polishing device and method

A polishing pad and method of polishing with a chemical mechanical planarization apparatus includes providing a bulk polishing pad material having a front polishing surface side and a back side. The polishing pad further includes a polishing pad wear indicator for indicating a polishing pad wear during a life cycle of the polishing pad. The polishing pad wear indicator is formed on the back side of the bulk polishing pad material.

CMP polishing pad backside modifications for advantageous polishing

Method of removing slurry particles

A gas discharge illumination device is prepared by encapsulating ionizable gas within microporous or nanoscale sealed cavities created within a matrix material. Upon exposure of said matrix material to an electric field, the ionizable gas becomes ionized and emits light. By incorporating several different ionizable gases into one matrix material, a display with different colors of light can be produced. The gas discharge illumination device can be fabricated by a variety of techniques including selective cavity formation with overcoating taking place in an ionizable gas ambient, and bubbling ionizable gas through the matrix material while it is in viscous form. The gas discharge illumination device can be used to form either active or passive displays, as a sensor for detecting electric fields, and in other applications.

Gas discharge devices including matrix materials with ionizable gas

A desired reagent is delivered to a workpiece undergoing a chemical mechanical polishing process with a chemical mechanical planarization apparatus. A slurry and polishing pad are provided for the polishing process. Reagent containing microcapsules are also provided, the microcapsules encapsulating a desired reagent. The workpiece is polished with a combination of the slurry, the polishing pad, and the microcapsules, wherein the encapsulated reagents are controllably released during the polishing step via manipulation of a polishing parameter. In one embodiment, the microcapsules are included in the slurry. In an alternate embodiment, the microcapsules are embedded within the polishing pad.

Polishing pad with controlled release of desired micro-encapsulated

A chemical mechanical planarization tool and method are presented employing a non-linear motion of the carrier arm relative to the polishing pad. The non-linear motion of the carrier arm relative to the polishing pad can be accomplished in a variety of ways, for example, employing a mechanical template having an irregular opening or programming the carrier displacement mechanism to move the carrier in an irregular, non-rotational X-Y path over the polishing pad.

Variable travel carrier device and method for planarizing semiconductor

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Milton, VT, United States of America

Matthew J Rutten