Renesas Technology Corp.

Masaru Kawakami

Takashi Kikuchi

Takafumi Nishita

Ryosuke Kimoto

Takashi Miwa

Masanori Shibamoto

Hiroshi Koyama

Hiroshi Kawakubo

Chikako Imura

For high density packaging of a semiconductor device, the semiconductor device has a multi-layer substrate, a first-stage chip connected electrically to the multi-layer substrate, other package substrates stacked in three stages on the multi-layer substrate and each connected to an underlying wiring substrate through solder balls, second-, third- and fourth-stage chips electrically connected respectively to the other package substrates, and solder balls provided on the bottom multi-layer substrate. The number of wiring layers in the bottom multi-layer substrate which has a logic chip is larger than that in the package substrates which have memory chips, whereby the semiconductor device can have a wiring layer not used for distribution of wires to the solder balls and wiring lines in the wiring layer can be used for the mounting of another semiconductor element or a passive component to attain high density packaging of the semiconductor device as a stacked type package.

Semiconductor device

Growing community of inventors

Machida, Japan

Masaru Kawakami