Renesas Electronics Corporation

Sanyo Electric Co., Ltd.

Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Rayon Company, Limited

Renesas Technology Corp.

Shimadzu Corporation

Jeol Ltd.

Nohmi Bosai Ltd.

Tohoku University

Nohmi Boasai Ltd.

Masao Inoue

Jiro Yugami

Masaharu Mizutani

Shingo Suzuki

Akihiro Daikoku

Hiroshi Umeda

Masaru Kadoshima

Shigekazu Sakabe

Takeo Hamamatsu

Akinori Yamasaki

Takashi Nagase

Yoshiyuki Kawashima

Yasuhiro Shimamoto

Hiromichi Tonami

Toyoki Fujihara

Junichi Tsuchimoto

Hiroshi Horikawa

Ikuo Konishi

Yutaro Kimura

Hideyuki Asanuma

Tetsuhiko Ikeshima

Koji Nishio

Ikuo Yonezu

Mutsumi Yano

Naoya Nakanishi

Teruhiko Imoto

Katsuhiko Shinyama

Mitsuzo Nogami

Shimpei Tsujikawa

Masao Takee

Keisuke Minami

Akinobu Teramoto

Atsushi Yoshitomi

Atsutoshi Ako

Yoshiki Maruyama

Yasuhiko Ikeda

Yasuaki Nakanishi

Yasuhiko Akamatsu

Kouji Nomura

Yukari Kuratomi

Kenichi Mori

Shin Fujitani

Shoji Yoshikawa

Hideo Takahashi

Akio Nishida

Yukio Kobayashi

Hiroshi Watanabe

Tomoya Saito

Katsuhiko Yamada

Takahiro Maruyama

Kota Funayama

Katsushige Tsuno

Mitsunori Tokuda

Reizo Maeda

Tadashi Ise

Tetsuyuki Murata

Tetsuo Oikawa

Yorinobu Kunimune

Yoshinori Igarashi

Yasushi Kuroda

Masatoshi Takesue

Hiroshi Sato

Shoichi Nagai

Fumito Aosai

Yuu Takanashi

Shinsuke Sakashita

Hajime Gotoh

Hirofumi Sako

Kousuke Satoguchi

Haruhiko Shimoji

Satoru Kometani

Daisuke Shindo

Naoyoshi Hinotsu

Katsumasa Miyatake

Norimasa Yoshida

Ichiro Yamakawa

Nobuyoshi Oi

Yasushi Horiuchi

Syozo Saito

Yasukazu Murakami

Yasumasa Kondo

A memory cell which is a non-volatile memory cell includes a gate insulating film having a charge storage layer capable of retaining charge and a memory gate electrode formed on the gate insulating film. The charge storage layer includes a first insulating film containing hafnium and silicon and a second insulating film formed on the first insulating film and containing hafnium and silicon. Here, a hafnium concentration of the first insulating film is lower than a hafnium concentration of the second insulating film, and a bandgap of the first insulating film is larger than a bandgap of the second insulating film.

Semiconductor device

The performances of a semiconductor device of a memory element are improved. Over a semiconductor substrate, a gate electrode for memory element is formed via overall insulation film of gate insulation film for memory element. The overall insulation film has first insulation film, second insulation film over first insulation film, third insulation film over second insulation film, fourth insulation film over third insulation film, and fifth insulation film over fourth insulation film. The second insulation film is an insulation film having charge accumulation function. Each band gap of first insulation film and third insulation film is larger than the band gap of second insulation film. The third insulation film is polycrystal film including high dielectric constant material containing metallic element and oxygen. Fifth insulation film is polycrystal film including the same material as that for third insulation film. Fourth insulation film includes different material from that for third insulation film.

Method for manufacturing a semiconductor device

A memory cell, which is a nonvolatile memory cell, includes a gate dielectric film having charge storage layer capable of holding charges, and a memory gate electrode formed on the gate dielectric film. The charge storage layer includes an insulating film containing hafnium, silicon, and oxygen, an insertion layer formed on the insulating film and containing aluminum, and an insulating film formed on the insertion layer and containing hafnium, silicon, and oxygen.

Semiconductor device including memory using hafnium and a method of manufacturing the same

To improve the performance of a semiconductor device, the semiconductor device includes an insulating film portion over a semiconductor substrate. The insulating film portion includes an insulating film containing silicon and oxygen, a first charge storage film containing silicon and nitrogen, an insulating film containing silicon and oxygen, a second charge storage film containing silicon and nitrogen, and an insulating film containing silicon and oxygen. The first charge storage film is included by two charge storage films.

Semiconductor device and manufacturing device of the same

A method for manufacturing a nonaqueous electrolyte secondary battery which includes an electrode assembly, a housing with an opening and contains the electrode assembly, and a sealing member sealing the opening, the electrode assembly comprising a positive electrode and a negative electrode. The positive electrode includes a positive electrode active material, lithium carbonate, and lithium phosphate, the negative electrode comprising a negative electrode active material. The method includes placing the electrode assembly in the housing, and placing a nonaqueous electrolyte containing lithium fluorosulfonate in the housing.

Nonaqueous electrolyte secondary battery and method for manufacturing the same

A nonaqueous electrolyte secondary battery includes an electrode assembly including a negative plate and a positive plate including a positive electrode active material mix layer, a nonaqueous electrolyte, a battery case that houses the electrode assembly and the nonaqueous electrolyte, and a pressure-sensitive safety system that operates when the pressure in the battery case reaches a value greater than or equal to a predetermined value. The positive electrode active material mix layer contains lithium carbonate and lithium phosphate. The average particle size of lithium carbonate contained in the positive electrode active material mix layer is greater than the average particle size of lithium phosphate contained in the positive electrode active material mix layer. The number of particles of lithium carbonate contained in the positive electrode active material mix layer is less than the number of particles of lithium phosphate contained in the positive electrode active material mix layer.

Nonaqueous electrolyte secondary battery

Semiconductor device having a memory and manufacturing method thereof

A nonaqueous electrolyte secondary battery includes a prismatic housing having an opening and a sealing member sealing the opening. The prismatic housing contains a flat-wound electrode assembly and a nonaqueous electrolyte. The flat-wound electrode assembly includes a positive electrode and a negative electrode. The positive electrode includes a positive electrode substrate and a positive electrode active material mixture layer formed on the positive electrode substrate. The positive electrode active material mixture layer contains lithium carbonate and lithium phosphate. The nonaqueous electrolyte contains lithium fluorosulfonate.

A memory cell includes a control gate electrode and a memory gate electrode. The control gate electrode is formed over the upper surface and the sidewall of a fin FA including apart of a semiconductor substrate. The memory gate electrode is formed over one side surface of the control gate electrode and the upper surface and the sidewall of the fin through an ONO film, in a position adjacent to the one side surface of the control gate electrode. Further, the control gate electrode and the memory gate electrode are formed of n-type polycrystalline silicon. A first metal film is provided between the gate electrode and the control gate electrode. A second metal film is provided between the ONO film and the memory gate electrode. A work function of the first metal film is greater than a work function of the second metal film.

Semiconductor device and its manufacturing method

The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating. In the present invention, a first electrically conductive type epitaxial layer is formed over a first electrically conductive type base substrate. The impurity concentration of the epitaxial layer is lower than that of the base substrate. A second electrically conductive type first embedded layer and a second electrically conductive type second embedded layer are formed in the epitaxial layer. The second embedded layer is deeper than the first embedded layer, is kept away from the first embedded layer, and has an impurity concentration lower than the first embedded layer. A transistor is further formed in the epitaxial layer.

Semiconductor device having a transistor and first and second embedded layers

The performance of a semiconductor device having a memory element is improved. An insulating film, which is a gate insulating film for a memory element, is formed on a semiconductor substrate, and a gate electrode for the memory element is formed on the insulating film. The insulating film has a first insulating film, a second insulating film thereon, and a third insulating film thereon. The second insulating film is a high-dielectric constant insulator film having a charge accumulating function and contains hafnium, silicon, and oxygen. Each of the first insulating film and the third insulating film has a band gap larger than the band gap of the second insulating film.

Semiconductor device and method of manufacturing the same

An improvement is achieved in the performance of a semiconductor device including a memory element. Over a semiconductor substrate, a gate electrode for the memory element is formed via an insulating film as a gate insulating film for the memory element. The insulating film includes first, second, third, fourth, and fifth insulating films in order of being apart from the substrate. The second insulating film has a charge storing function. The band gap of each of the first and third insulating films is larger than a band gap of the second insulating film. The band gap of the fourth insulating film is smaller than the band gap of the third insulating film. The band gap of the fifth insulating film is smaller than the band gap of the fourth insulating film.

Semiconductor memory incorporating insulating layers of progressively decreasing band gaps and method of manufacturing the same

To control a grain growth on laminated polysilicon films, a method of manufacturing a semiconductor device is provided. The method includes: forming a first polysilicon film () on a substrate (); forming an interlayer oxide layer () on a surface of the first polysilicon film (); forming a second polysilicon film () in contact with the interlayer oxide layer () above the first polysilicon film (); and performing annealing at a temperature higher than a film formation temperature of the first and second polysilicon films in a gas atmosphere containing nitrogen, after formation of the second polysilicon film ().

Semiconductor device and manufacturing method thereof

Disclosed is a semiconductor device including a first MISFET of an n channel type and a second MISFET of a p channel type, each of the MISFETs being configured with a gate insulating film featuring a silicon oxide film or a silicon oxynitride film and a gate electrode including a conductive silicon film positioned on the gate insulating film. Metal elements such as Hf are introduced near the interface between the gate electrode and the gate insulating film in both the first and second MISFETs such that metal atoms with a surface density of 1&#xd7;10to 5&#xd7;10atoms/cmare contained near the interface and each of the first and second MISFETs having a channel region containing an impurity the concentration of which is equal to or lower than 1.2&#xd7;10/cm.

Semiconductor device and manufacturing method of the same

Various methods are proposed for forming a gate insulation film, a metal gate layer, and others separately in an N-channel region and a P-channel region of an integrated circuit device having a CMIS or CMOS structure using a metal gate. One of the problems of the methods however has been that the process becomes complex. The present invention is that, in a manufacturing method of a CMOS integrated circuit device, a titanium-based nitride film for adjusting the electrical properties of a high-permittivity gate insulation film before a gate electrode film is formed includes a lower film containing a comparatively large quantity of titanium and an upper film containing a comparatively large quantity of nitrogen in an N-channel region and a P-channel region.

Semiconductor integrated circuit device and manufacturing method thereof

Growing community of inventors

Tokyo, Japan

Masao Inoue