Sanyo Electric Co., Ltd.

Masanori Nishida

Masashige Aoyama

Hiroshi Onodera

Shigeo Ootani

An insulated gate field effect transistor fabricated in one conductivity type semiconductor substrate wherein a source region and a drain region are formed apart each other to define a channel region therebetween, having a deep ion implantation region which is so formed in the lower portion of the channel region that at least one end portion of the depletion region of the channel extends towards the source region beyond the border between the source region and the channel region at the surface of the substrate whereby an imaginary straight line drawn from said border at the surface of the substrate and an intersecting point between the depletion region of the source and the depletion region of the channel region without a back gate bias voltage defines an angle larger than 90.degree. against the surface of the substrate.

Insulated gate field effect transistor with buried layer

A semiconductor device comprises an oxide film and a polysilicon electrode formed in succession on a semiconductor substrate, and a phosphor silicate glass layer formed on the polysilicon electrode and the oxide film and having the smoothed surface. An aluminum electrode is formed on the phosphor silicate glass. A nitride film is formed on the aluminum electrode and the phosphor silicate glass layer, for example, by a chemical vapor deposition process, so as to completely cover the phosphor silicate glass layer.

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Ota, Japan

Masanori Nishida