Sanyo Electric Co., Ltd.

Masanao Kitagawa

Hirotoshi Kubo

Eiichiroh Kuwako

Hiroaki Saito

Masahito Onda

Hiroaki Saitou

Keita Odajima

A power MOSFET comprises: a semiconductor substrateof a first conduction type; a drain layerof the first conduction type and formed on a surface layer of the substrate; a gate insulating filmformed in a partial region on the drain layer; a gate electrodeformed on the gate insulating film; an insulating filmformed on the gate electrode; a side wall insulatorformed on side walls of the gate insulating film, the gate electrode, and the insulating film; a recess formed on the drain layerand in a region other than a region where the gate electrodeand the side wall insulatorare formed; a channel layerof a second conduction type opposite to the first conduction type and formed in a range from the region where the recess is formed to a vicinity of the region where the gate electrodeis formed; a source region layerof the one conduction type and formed on the channel layeroutside the recess; and a wiring layerformed to cover the channel layerwhich is exposed through the recess, the side wall insulator, and the insulating film.

Semiconductor device and a method of fabricating the same

The present invention improves the characteristic of a trench-type vertical MOSFET. When a trench serving as a gate is formed, it is made in a shape of &ldquo;&ggr;&rdquo; which is convex toward the inside of the trench. Thus, the surface area of the trench is reduced so that both gate-source capacitance and gate-drain capacitance can be reduced, thereby shortening the switching time of the MOSFET.

Method of fabricating semiconductor device

The present invention improves the characteristic of a trench-type vertical MOSFET. When a trench 23 serving as a gate 25 is formed, it is made in a shape of '.gamma.' which is convex toward the inside of the trench. Thus, the surface area of the trench is reduced so that both gate-source capacitance and gate-drain capacitance can be reduced, thereby shortening the switching time of the MOSFET.

Semiconductor device and method of fabricating the same

A first conductivity layer and a first insulating film are successively formed on a channel layer, and a photoresist film is formed on the first insulating film. The photoresist film is selectively exposed to light using a photomask and patterned. Using the patterned photoresist film as a mask, the first insulating film and the first conductivity layer are etched to form source electrodes from the first conductivity layer. Using the first insulating film and the source electrodes as a mask, an impurity of one conductivity type is diffused into exposed portions of the channel layer to form source regions. A second insulating film is formed in covering relation to side walls and upper surfaces of the source electrodes. Using the second insulating film as a mask, the channel layer and the common drain layer are etched to form trenches in the source regions, the channel layer, and the common drain layer. A third insulating film is formed on surfaces of the trenches, and a second conductive layer is formed as a gate electrode on the entire surface so as to fill up the trenches and cover the second insulating film.

Method of manufacturing semiconductor device

A channel layer is formed in a surface of a semiconductor substrate, and a plurality of trenches are formed in the surface of the semiconductor substrate, the trenches being deeper than the channel layer. Then, gate electrodes are formed in the trenches, respectively, after which body layers are formed between the trenches and source layers are formed adjacent to the trenches.

Growing community of inventors

Osaka, Japan

Masanao Kitagawa