Shin-etsu Handotai Co., Ltd.

Shin-etsu Quartz Products Co., Ltd.

Shin-etsu Quartz Co., Ltd.

Masahiro Sakurada

Izumi Fusegawa

Tomohiko Ohta

Nobuaki Mitamura

Ryoji Hoshi

Kiyotaka Takano

Masanori Kimura

Makoto Iida

Atsushi Ozaki

Takeshi Kobayashi

Hideki Yamanaka

Wataru Sato

Eiichi Iino

Hirotoshi Yamagishi

Katsuhiko Kemmochi

Ohta Tomohiko

Tomohiko Oota

Hiroshi Takeno

Susumu Sonokawa

Koji Kitagawa

Makoto Kobayashi

Satoshi Soeta

Koichi Kanaya

Kouji Kitagawa

Junya Tokue

Shinichi Horie

Yuichi Miyahara

Tatsuo Mori

A method evaluates an edge shape of a silicon wafer, in which as shape parameters in a wafer cross section, when defining a radial direction reference L, a radial direction reference L, an intersection point P, a height reference plane L, h[&#x3bc;m], h[&#x3bc;m], a point Px, a straight line Lx, an angle &#x3b8;x, a point Px, &#x3b4; [&#x3bc;m], a point Px, and a radius Rx [&#x3bc;m], the edge shape of the silicon wafer is measured, values of the shape parameters h, h, and &#x3b4; are set, the shape parameters Rx and &#x3b8;x are calculated in accordance with the definition based on measurement data of the edge shape, and the edge shape of the silicon wafer is determined from the calculated Rx and &#x3b8;x to be evaluated. Consequently, a method evaluates an edge shape of a silicon wafer capable of preventing an occurrence of trouble.

Method for evaluating edge shape of silicon wafer, apparatus for evaluating thereof, silicon wafer, method for selecting and method for manufacturing thereof

A silicon epitaxial wafer including: a second intermediate epitaxial layer on a silicon substrate produced by being cut from a silicon single crystal ingot grown by the CZ method so as to have a carbon concentration ranging from 3&#xd7;10to 2&#xd7;10atoms/cm, a first intermediate epitaxial layer doped with a dopant, and an epitaxial layer of a device forming region stacked on the first intermediate epitaxial layer, and to a method of producing this wafer. Also providing an industrially excellent silicon epitaxial wafer that is produced with a silicon substrate doped with carbon and used as a semiconductor device substrate such as a memory, a logic, or a solid-state image sensor, and a method of producing this silicon epitaxial wafer.

Silicon epitaxial wafer and method of producing silicon epitaxial wafer

A method of producing a phosphorus-doped silicon single crystal, including pulling the phosphorus-doped silicon single crystal from a silicon melt doped with phosphorus by Magnetic field applied Czochralski (MCZ) method, wherein the phosphorus is doped such that a phosphorus concentration of the phosphorus-doped silicon single crystal is 2&#xd7;10atoms/cmor more, and a horizontal magnetic field is applied to the silicon melt with a central magnetic field strength of 2,000 gauss or more such that the phosphorus-doped silicon single crystal to be produced has an oxygen concentration of 1.6&#xd7;10atoms/cm(ASTM'79) or more. A method of producing a silicon single crystal that is heavily doped with phosphorus and has an oxygen concentration of 1.6&#xd7;10atoms/cm(ASTM'79) or more.

Method of producing silicon single crystal

A method for manufacturing an epitaxial wafer for manufacture of an image pickup device, wherein, before the growth of the epitaxial layer, a thickness X of a region where oxygen concentration in the epitaxial layer becomes 4&#xd7;10atoms/cmor more after the manufacture of the image pickup device is calculated and, in the growth of the epitaxial layer, the epitaxial layer is grown with a thickness such that a thickness of a region where the oxygen concentration in the epitaxial layer is less than 4&#xd7;10atoms/cmafter the manufacture of the image pickup device is 6 &#x3bc;m or more in addition to the thickness X. As a result, it is possible to provide the epitaxial wafer in which an adverse effect of an impurity such as oxygen in the silicon wafer is not exerted on an image pickup device forming portion of the epitaxial layer and a manufacturing method thereof.

Epitaxial wafer and manufacturing method thereof

A method of manufacturing a single crystal based on a Czochralski method of applying a horizontal magnetic field, wherein the single crystal is pulled in such a manner that a radial magnetic field intensity gradient &#x394;Br/&#x394;Rc in a direction connecting central points of magnetic field generation coils exceeds 5.5 (Gauss/mm) and becomes 10 (Gauss/mm) or below where an origin O is a central part of the single crystal on a solid-liquid interface, &#x394;Br (Gauss) is a variation in a magnetic field intensity from the origin O to a crucible inner wall on a surface of a melt, and &#x394;Rc (mm) is a radial distance from the origin O to the crucible inner wall on the surface of the melt.

Method of manufacturing single crystal

The present invention is an SOI wafer in which at least a silicon active layer is formed over a support substrate via an insulator film or on a support substrate directly, wherein, at least, the silicon active layer consists of a P(phosphorus)-doped silicon single crystal grown by Czochralski method, which is occupied by N region and/or defect-free I region, and contains Al (aluminum) with concentration of 2&#xd7;10atoms/cc or more. There can be provided with ease and at low cost an SOI wafer with high electrical reliability in a device fabrication process, that has an excellent electric property without generation of micro pits by cleaning with hydrofluoric acid etc. even in the case of forming an extremely thin silicon active layer, or that retains high insulation property even in the case of forming an extremely thin inter-layer insulator film.

Soi wafer and a method for producing the same

An SOI wafer in which a base wafer and a bond wafer respectively consisting of silicon single crystal are bonded via an oxide film, and then the bond wafer is thinned to form a silicon active layer, wherein the base wafer is formed of silicon single crystal grown by Czochralski method, and the whole surface of the base wafer is within N region outside OSF region and doesn't include a defect region detected by Cu deposition method, or the whole surface of the base wafer is within a region outside OSF region, doesn't include a defect region detected by Cu deposition method, and includes I region containing dislocation cluster due to interstitial silicon. Thereby, there is provided an SOI wafer that retains high insulating properties and has an excellent electrical reliability in device fabrication even in the case of forming an extremely thin interlevel dielectric oxide film with, for example, a thickness of 100 nm or less.

The present invention is a method for producing a single crystal with pulling the single crystal from a raw material melt in a chamber by CZ method, wherein when growing the single crystal, where a pulling rate is defined as V and a temperature gradient of the crystal is defined as G during growing the single crystal, the temperature gradient G of the crystal is controlled by changing at least two or more of pulling conditions. Thereby, there is provided a method for producing a single crystal in which when the single crystal is grown by CZ method, V/G can be controlled without lowering a pulling rate V, and thus the single crystal including a desired defect region can be produced effectively for a short time.

Method for producing a single crystal and a single crystal

A method for producing a single crystal in which when the single crystal is grown by Czochralski method, V/G is controlled by controlling a fluctuation of a temperature gradient G of the crystal which is being pulled without lowering a pulling rate V, thereby the single crystal including a desired defect region over a whole plane in a radial direction of the crystal entirely in a direction of the crystal growth axis can be produced effectively for a short time at a high yield.

The present invention provides an annealed wafer which has a wafer surface layer serving as a device fabricating region and having an excellent oxide film dielectric breakdown characteristic, and a wafer bulk layer in which oxide precipitates are present at a high density at the stage before the wafer is loaded into the device fabrication processes to give an excellent IG capability, and a method for manufacturing the annealed wafer. The present invention is directed to an annealed wafer obtained by performing heat treatment on a silicon wafer manufactured from a silicon single crystal grown by the Czochralski method, wherein a good chip yield of an oxide film dielectric breakdown characteristic in a region having at least a depth of up to 5 &#x3bc;m from a wafer surface is 95% or more, and a density of oxide precipitates detectable in the wafer bulk and each having a size not smaller than a size showing a gettering capability is not less than 1&#xd7;10/cm.

Annealed wafer and method for manufacturing the same

In a method for producing a silicon single crystal by Czochralski method, the single crystal is grown with controlling a growth rate between a growth rate at a boundary where a defect region detected by Cu deposition remaining after disappearance of OSF ring disappears when gradually decreasing a growth rate of silicon single crystal during pulling and a growth rate at a boundary where a high oxygen precipitation Nv region having a density of BMDs of 1&#xd7;10numbers/cmor more and/or a wafer lifetime of 30 &#x3bc;sec or less after oxygen precipitation treatment disappears when gradually decreasing the growth rate further. Thereby, there is provided a silicon single crystal which does not belong to any of V region rich in vacancy, OSF region and I region rich in interstitial silicon, and has excellent electrical characteristics and gettering capability, so that yield of devices can be surely improved, and also an epitaxial wafer.

Silicon single crystal wafer, an epitaxial wafer and a method for producing a silicon single crystal

The present invention discloses a graphite heater for producing a single crystal used when producing a single crystal by the Czochralski method which comprises at least a terminal part to which electric current is supplied and a cylindrical heat generating part by resistance heating and are provided so as to surround a crucible for containing a raw material melt wherein the heat generating part has heat generating slit parts formed by being provided with upper slits extending downward from the upper end and lower slits extending upwards from the lower end by turns, and a length of at least one slit of the upper slits differs from others and/or a length of at least one slit of the lower slits differs from others so that a heat generating distribution of the heat generating part may be changed. Thereby, there can be provided a graphite heater for producing a single crystal which makes it possible to produce a silicon single crystal with high productivity when the silicon single crystal is pulled in a predetermined defect-free region or a predetermined defect region.

Graphite heater for producing single crystal, apparatus for producing single crystal, and method for producing single crystal

The present invention is a method for producing a single crystal of which a whole plane in a radial direction is a defect-free region with pulling the single crystal from a raw material melt in a chamber by Czochralski method, wherein a pulling condition is changed in a direction of the crystal growth axis during pulling the single crystal so that a margin of a pulling rate is always a predetermined value or more that the single crystal of which the whole plane in a radial direction is a defect-free region can be pulled. Thereby, there can be provided a method for producing a single crystal in which when a single crystal is produced by CZ method, the single crystal of which a whole plane in a radial direction is a defect-free region entirely in a direction of the crystal growth axis can be produced with stability.

Method for producing single crystal and single crystal

The present invention is a method of producing a P(phosphorus)-doped silicon single crystal by Czochralski method, wherein, at least, a growth of the single crystal is performed so that an Al (aluminum) concentration is 2&#xd7;10atoms/cc or more. Thereby, there can be provided a method of easily and inexpensively producing a P(phosphorus)-doped silicon single crystal of defect-free region having an excellent capability of electrical characteristics to be high breakdown voltage, which contains neither, for example, V region, OSF region, nor large dislocation cluster (LSEPD, LFPD) region.

Method of producing P-doped silicon single crystal and P-doped N-type silicon single crystal wafer

In a method for producing an SOI wafer comprising steps of implanting ions from a bond wafer surface to form an ion-implanted layer inside the wafer, bonding the ion-implanted bond wafer surface and a surface of a base wafer via an oxide film or directly, and forming an SOI wafer by delaminating by heat treatment a part of the bond wafer at the ion-implanted layer, the bond wafer is a silicon wafer that consists of a silicon single crystal grown by Czochralski method, that is occupied by N region outside OSF generated in a ring shape and that has no defect region detected by Cu deposition method. Thereby, even an extremely thin SOI layer having a thickness of 200 nm or less, can provide an SOI wafer that has an excellent electric property without micro pits caused by acid cleaning, and can be produced without increasing the number of processes.

Growing community of inventors

Fukushima, Japan

Masahiro Sakurada