Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Vlsi Limited

Masaaki Miyajima

Hiromi Hoshino

Hiroshi Yasuda

Minoru Suzuki

Kiichi Sakamoto

Yutaka Nakamura

Kozo Ogino

Satoru Yamazaki

Hiroshi Takita

Kazumasa Morishita

Yoshitada Aihara

Yoshio Ito

Yoshihisa Komura

A method for preparing data for exposure includes forming a first plurality of rectangular patterns from a reticle preparing rule; lining an object pattern for performing reticle exposure with the first rectangular patterns, and extracting a second plurality of rectangular patterns, disposed in an N&#xd7;N matrix, from the first plurality of rectangular patterns in the object pattern; and performing a violation detecting treatment and a correcting treatment of the pattern width and the pattern distance of the reticle exposure pattern on the basis of the distance between the second plurality of rectangular patterns.

Preparing data for hybrid exposure using both electron beam exposure and reticle exposure in lithographic process

A variable rectangle-type electron beam exposure apparatus for forming rectangular beams of different angles which is capable of highly finely conducting exposure with respect to a predetermined fine line pattern having an arbitrary angle in the pattern region. The apparatus includes a first slit member () in which a plurality of rectangular apertures () are respectively arranged by different angles; a second slit member () in which a plurality of rectangular apertures () which are respectively positioned in parallel with the corresponding rectangular apertures of the first slit member, are arranged; and a deflecting unit () for deflecting an electron beam, which has been transmitted through a plurality of apertures of the first slit member, so that, when the electron beam transmitted through the first aperture of the first slit member is transmitted through the corresponding first aperture of the second slit member, the electron beam transmitted through the apertures except for the first aperture of the first slit can be intercepted by the second slit member.

Variable rectangle-type electron beam exposure apparatus and pattern exposure-formation method

A computer implemented method and an apparatus for generating exposure data of a layout pattern used to fabricate semiconductor integrated circuits. The layout pattern is first analyzed to determine if it can be modified to one or more predefined patterns without having to segment the layout pattern into rectangular patterns. The layout pattern is then modified to the one or more predefined patterns. The modified pattern is also analyzed to determine if it can be modified into segmental block patterns and if so, it is modified accordingly. Finally, exposure data is generated using the modified segmental block patterns.

Method and apparatus for generating semiconductor exposure data

Producing an exposure data used for exposing a design pattern data of a semiconductor integrated circuit on an exposure medium. Repetitive exposure pattern data is extracted from the design pattern data as a group of exposure pattern data. The group of exposure pattern data includes plural pieces of the repetitive exposure pattern data. A rearrangement information table, which includes information for placing the plural pieces of repetitive exposure pattern data in a predetermined rearrangement area, is generated. The design pattern data is rearranged based on the rearrangement information table to generate the exposure data.

Method and apparatus for generating exposure data of semiconductor

Improved block exposure techniques for a semiconductor wafer that use a block mask with an exposure pattern separated into blocks are disclosed. Each block comprises a plurality of block elements having parts of the exposure pattern and installed on the block mask. A plurality of block elements having predetermined patterns are extracted from the exposure pattern. Each of the predetermined patterns is present in at least one partial area of an associated one of the block elements. A combination of a plurality of extracted block elements having patterns arrangeable in a single block is specified based on pattern present areas of the individual extracted block elements. The patterns of combined extracted block elements are laid out in a single block and an irradiation mode of that block is changed from a full irradiation mode to a partial irradiation mode.

Block exposure of semiconductor wafer

A mask and a block exposure method for transferring a plurality of patterns of the same shape onto an exposure medium while forming the cross-sectional shape of a beam emitted from a light source into a desired pattern. The mask has at least one basic pattern formed by extracting portions of a common shape from pattern information to be exposed. A plurality of blocks are arranged on the mask. Each block includes a plurality of the basic patterns.

A method of dividing a block pattern for use in a block exposure, to be implemented on a computer, divides an arbitrary block which is to be formed in a block mask that is used for the block exposure when the arbitrary block is judged as including a prohibiting pattern which is undesirable from a point of view of the block exposure. This method comprises the steps of (a) dividing the arbitrary block in a first direction to obtain a first block having a first dividing width along a second direction which is perpendicular to the first direction, (b) dividing a remaining block portion of the arbitrary block excluding the first block in the first direction to obtain a first divided portion having a second dividing width along the second direction, and merging the first dividing portion to the first block if the second dividing width is less than a predetermined width, and (c) searching the first block in the first direction after the step (b) and merging one of two adjacent first patterns within the first block to a second block if a pattern interval which is less than a predetermined value extends along the first direction between the first patterns.

Pattern judging method, mask producing method, and method of dividing

A pattern data processing method processes hierarchical pattern data which has a hierarchical structure and describes in each level thereof one or a plurality of internal cells constituting one or a plurality of logic blocks of a semiconductor integrated circuit device which is to be produced. The pattern processing method comprises the steps of defining a frame at a boundary between a level i of the hierarchical structure and a level i+1 which is higher than the level i, cutting a first portion of a pattern which protrudes out of the frame form the level i to the level i+1 and defining the cut, first portion as a pattern of the level i+1, cutting a second portion of a pattern which protrudes out of the frame from the level i+1 to the level i and deleting the cut, second portion, and repeating the steps of cutting the first and second portions for a predetermined number of levels for increasing values of i, where i=1, 2, . . . , n, n is an arbitrary integer and the pattern of the semiconductor integrated circuit device is described in a highest level n+1.

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Kasugai, Japan

Masaaki Miyajima