Infineon Technologies Ag

Martina Hommel

Heinrich Koerner

Markus Schwerd

Martin Seck

Thomas Goebel

Johann Helneder

Andrea Mitchell

Wolfgang Klein

Oliver Aubel

Stefan Drexl

Wolfgang Hasse

Heinrich Körner

Heinrich Kôrner

An explanation is given of, inter alia, methods in which the barrier material is removed at a via bottom or at a via top area by long-term heat treatment. Concurrently or alternatively, interconnects are coated with barrier material in a simple and uncomplicated manner by means of the long-term heat treatment.

Long-term heat treated integrated circuit arrangements and methods for producing the same

A multifunctional dielectric layer can be formed on a substrate, especially on an exposed metallic strip conductor system on a substrate. An additional metal layer is formed across the surface of the exposed metal strip conductors. The metal layer is then at least partially converted to a nonconducting metal oxide, the dielectric layer.

Process for producing a multifunctional dielectric layer on a substrate

Long-term heat-treated integrated circuit arrangements and methods for producing the same

An integrated circuit arrangement includes a substrate with a multiplicity of integrated semiconductor components arranged therein, the substrate having a wiring interconnect near to the substrate, a middle wiring interconnect and a wiring interconnect remote from the substrate, which are arranged in this order at increasing distance from the substrate.

System and method for integrated circuit arrangement having a plurality of conductive structure levels

A connection arrangement having an outer conductive structure arranged at least partly or completely in a cutout of an electrical insulation layer is provided. An inner conductive structure is arranged at the bottom of the cutout on one side of the insulation layer. The inner conductive structure adjoins the outer conductive structure in a contact zone. A contact area is arranged at the outer conductive structure on the other side of the cutout. The contact zone and the contact area do not overlap. The bottom of the cutout is arranged to overlaps at least half of the contact area, to provide a step in the insulation layer at the edge of the cutout outside a main current path between the contact area and the inner conductive structure.

Integrated connection arrangements

An integrated circuit arrangement is disclosed. In one embodiment, the integrated circuit arrangement includes at least three conductive structure levels in which in each case elongated interconnects are arranged.

Integrated circuit arrangement having a plurality of conductive structure levels and capacitor, and a method for producing the integrated circuit arrangement

An integrated circuit arrangement is disclosed. In one embodiment, the integrated circuit arrangement includes at least three conductive structures levels and elongated interconnects.

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Munich, Germany

Martina Hommel