Globalfoundries Inc.

Globalfoundries U.S. Inc.

Martin O'Toole

Hsueh-Chung Chen

Terry Allen Spooner

Brendan O'Brien

Keith Donegan

Jason Eugene Stephens

Ravi Prakash Srivastava

Craig Child

Christopher J Penny

Matthias Lehr

Louis DeWolf Lanzerotti

Atsushi Ogino

Marcel Wieland

Sean Reidy

Steven McDermott

Jae O Choo

Adam L Da Silva

Ernesto Gene De La Garza

Methods of self-aligned multiple patterning. A hardmask is deposited over an interlayer dielectric layer. A mandrel is formed over the hardmask. A block mask is formed that covers a first lengthwise section of the mandrel and that exposes second and third lengthwise sections of the mandrel. After forming the block mask, the second and third lengthwise sections of the mandrel are removed to define a pattern including respective first and second mandrel lines that are separated from each other by the first lengthwise section of the mandrel. The first mandrel line and the second mandrel line expose respective portions of the hardmask, and the first lengthwise section of the mandrel line covers another portion of the hardmask. The pattern is transferred to the hardmask with an etching process, and subsequently transferred to the interlayer dielectric layer with another etching process.

Multiple patterning with mandrel cuts defined by block masks

Methods of self-aligned multiple patterning. First and second mandrels are formed over a hardmask, and a conformal spacer layer is deposited over the first mandrel, the second mandrel, and the hardmask between the first mandrel and the second mandrel. A planarizing layer is patterned to form first and second trenches that expose first and second lengthwise portions of the conformal spacer layer respectively between the first and second mandrels. After patterning the planarizing layer, the first and second lengthwise portions of the conformal spacer layer are removed with an etching process to expose respective portions of the hardmask along a non-mandrel line. A third lengthwise portion of the conformal spacer layer is masked during the etching process by a portion of the planarizing layer and defines a non-mandrel etch mask.

Multiple patterning with lithographically-defined cuts

The present disclosure relates to semiconductor structures and, more particularly, to merged mandrel lines and methods of manufacture. The structure includes: at least one metal line having a first dimension in a self-aligned double patterning (SADP) line array; and at least one metal line having a second dimension inserted into the SADP line array, the second dimension being different than the first dimension.

Merge mandrel features

Methods of self-aligned multiple patterning. A mandrel is formed over a hardmask, and a planarizing layer is formed over the mandrel and the hardmask. The planarizing layer is patterned to form first and second trenches exposing respective first and second lengthwise sections of the mandrel. A portion of the patterned planarizing layer covers a third lengthwise section of the mandrel arranged between the first and second lengthwise sections of the mandrel. After patterning the planarizing layer, the first and second lengthwise sections of the mandrel are removed with an etching process to define a pattern including a mandrel line exposing respective first portions of the hardmask. The third lengthwise section of the mandrel is masked by the portion of the planarizing layer during the etching process, and the third lengthwise section covers a second portion of the hardmask arranged along the mandrel line between the first portions of the hardmask.

Multiple patterning with late lithographically-defined mandrel cuts

Methods of forming an interconnect of an IC are disclosed. The methods include forming a first interlayer dielectric (ILD) layer and a second ILD layer with an ILD etch stop layer (ESL) therebetween. The ILD ESL has an etch rate that is at least five times slower than the first and second ILD layers, and may include, for example, aluminum oxynitride. A dual damascene (DD) hard mask is used to form a wire trench opening in the second ILD layer and a via opening in the first ILD layer, creating a via-wire opening. Due to the slower etch rate, the ILD ESL defines the via opening in the first ILD layer as a chamferless via opening. A unitary via-wire conductive structure coupled to the conductive structure in the via-wire opening can be formed from the via-wire opening.

Interconnect formation with chamferless via, and related interconnect

Methods of effecting bond adhesion between metal structures, methods of preparing articles including bonded metal structures, and articles including bonded metal structures are provided herein. In an embodiment, a method of effecting bond adhesion between metal structures includes forming a first metal structure on a substrate. The first metal structure includes grains that have a {111} crystallographic orientation, and the first metal structure has an exposed contact surface. Formation of an uneven surface topology is induced in the exposed contact surface of the first metal structure after forming the first metal structure. A second metal structure is bonded to the exposed contact surface of the first metal structure after inducing formation of the uneven surface topology in the exposed contact surface.

Methods of forming articles including metal structures having maximized bond adhesion and bond reliability

When forming sophisticated semiconductor devices including metal pillars arranged on contact pads, which may comprise aluminum, device performance and reliability may be improved by avoiding exposure of the contact pad material to the ambient atmosphere, in particular during and between dicing and packaging processes. To this end, the contact pad material may be covered by a protection layer or may be protected by the metal pillars itself, thereby concurrently improving mechanical stress distribution in the device.

Growing community of inventors

Saratoga Springs, NY, United States of America

Martin O'Toole