Infineon Technologies Ag

Maria Heidenblut

Gunther Mackh

Gerhard Leschik

Adolf Koller

Raimund Foerg

Reinhard Pufall

Sergey Ananiev

Michael Goroll

Walter Preis

Andreas Bauer

Anatoly Sotnikov

Stefan Kaiser

Kabula Mutamba

Georg Reuther

A semiconductor chip having a crack stop structure is disclosed. The crack stop structure includes one or more recesses formed in the semiconductor chip. The one or more recesses extend adjacent to and along a periphery of the semiconductor chip. The one or more recesses are filled with a metal material. The metal material has an intrinsic tensile stress at room temperature that induces compressive stress in at least a region of the periphery of the semiconductor chip.

Semiconductor chip having a crack stop structure

A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.

Wafer and method for processing a wafer

In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process. The second side is opposite the first side. The dicing layer is disposed under the groove within the substrate. The substrate is singulated through the dicing layer.

Singulation processes

Disclosed is a method of structuring a material surface by dry etching, so that a passivation layer soluble in a solvent forms by the dry etching on parts of the structured material surface, sealing the passivation layer with a substance soluble in the solvent, and removing the sealed passivation layer and the substance by means of the solvent.

Method of etching a material surface

Growing community of inventors

Schwarzenfeld, Germany

Maria Heidenblut