Freescale Semiconductor,inc.

Motorola Corporation

Marc A Rossow

Sung-Taeg Kang

Voon-Yew Thean

Tab Allen Stephens

Kimberly Gay Reid

Dina H Triyoso

Gregory S Spencer

Victor H Vartanian

Daniel Thanh-Khac Pham

Jinmiao James Shen

James P Geren

Jian Feng Chen

Bich-Yen Nguyen

Cheong Min Hong

Olubunmi O Adetutu

Brian A Winstead

Robert F Steimle

James Kenyon Schaeffer, Iii

Yeong-Jyh Tom Lii

Rode R Mora

Horacio P Gasquet

Yasuhito Shiho

Melissa O Zavala

Sherry G Straub

Anna M Phillips

Al T Koh

Ricardo Garcia

Anne Vandooren

A non-volatile memory device includes a substrate and a charge storage layer. The charge storage layer comprises a bottom layer of oxide, a layer of discrete charge storage elements on the bottom layer of oxide, and a top layer of oxide on the charge storage elements. A control gate is on the top layer of oxide. A surface of the top layer of oxide facing a surface of the control gate is substantially planar.

Method of making a non-volatile memory (NVM) cell structure

A method includes forming a first dielectric layer over a substrate; forming nanoclusters over the first dielectric layer; forming a second dielectric layer over the nanoclusters; annealing the second dielectric layer using nitrous oxide; and after the annealing the second dielectric layer, forming a gate electrode over the second dielectric layer.

Method of annealing a dielectric layer

A semiconductor device is provided which comprises a semiconductor layer (), a dielectric layer (), first and second gate electrodes () having first and second respective work functions associated therewith, and a layer of hafnium oxide () disposed between said dielectric layer and said first and second gate electrodes.

Semiconductor device with selectively modulated gate work function

Nanocrystals are formed over an insulating layer by depositing a semiconductor layer over the insulating layer. The semiconductor layer is annealed to form a plurality of globules from the semiconductor layer. The globules are annealed using oxygen. Semiconductor material is deposited on the plurality of globules to add semiconductor material to the globules. After depositing the semiconductor material, the globules are annealed to form the nanocrystals. The nanocrystals can then be used in a storage layer of a non-volatile memory cell, especially a split-gate non-volatile memory cell having a select gate over the nanocrystals and a control gate adjacent to the select gate.

Method of forming nanocrystals

Method to selectively modulate gate work function through selective Ge condensation and high-K dielectric layer

A semiconductor fabrication process includes forming a gate electrode overlying a substrate. A first silicon nitride spacer is formed adjacent the gate electrode sidewalls and a disposable silicon nitride spacer is then formed adjacent the offset spacer. An elevated source/drain structure, defined by the boundaries of the disposable spacer, is then formed epitaxially. The disposable spacer is then removed to expose the substrate proximal to the gate electrode and a shallow implant, such as a halo or extension implant, is introduced into the exposed substrate proximal the gate electrode. A replacement spacer is formed substantially where the disposable spacer existed a source/drain implant is done to introduce a source/drain impurity distribution into the elevated source drain. The gate electrode may include an overlying silicon nitride capping layer and the first silicon nitride spacer may contact the capping layer to surround the polysilicon gate electrode in silicon nitride.

Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing

A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.

Method for forming a semiconductor device structure a semiconductor layer

Heating a reaction chamber or other apparatus in the absence of product wafers to a 'curing' temperature above a deposition temperature between the deposition of a film on a first set of semiconductor product wafers and the deposition of a film on a second set of semiconductor product wafers. In some embodiments, a boat with filler wafers is in the reaction chamber when the reaction chamber is heated to the curing temperature. In some examples, the films are deposited by a low pressure chemical vapor deposition (LPCVD) process. With some processes, if the deposition of a film on product wafers is at a temperature below a certain temperature, the film deposited with the product wafer on a boat, filler wafers, and/or other structures in the reaction chamber can cause contamination of product wafers subsequently deposited with a film in the presence of the boat and filler wafers. Contamination from these previously deposited films is inhibited by applying a curing temperature to the deposited fillers in the absence of the product wafers before a film is deposited on the next set of product wafers.

Film deposition on a semiconductor wafer

Method for forming a semiconductor device structure in a semiconductor layer

Growing community of inventors

Austin, TX, United States of America

Marc A Rossow