Sharp Kabushiki Kaisha Corporation

Makoto Tanigawa

Hiroki Tabuchi

Takayuki Taniguchi

Katsuji Iguchi

Hiroyuki Moriwaki

Yoshimitsu Yamauchi

Kenichi Tanaka

Keizo Sakiyama

Shigeo Ohnishi

Hiroshi Ishihara

Hidehisa Tateoka

Shingo Okazaki

A method for forming a fine resist pattern by exposing comprising the steps of: (i) forming a resist layer on a semiconductor substrate; (ii) forming a phase shifting pattern in an upper portion of the resist layer, the phase-sifting pattern having a tapered edge corresponding to a portion to which formation of an objective fine resist pattern is not desired; (iii) exposing the entire surface of the semiconductor substrate including the phase-shifting pattern; and (iv) forming a fine resist pattern below an outline except for the tapered edge of the phase-shifting pattern.

Method for forming a fine resist pattern

A method of fabricating a semiconductor device having a p-type semiconductor substrate and a p-well for memory cells which is formed in the substrate is disclosed. N-type impurities are implanted into a region of the substrate in which the p-well for memory cells is to be formed. Then, the region is selectively and thermally oxidized to form an oxide film on the first region, and the n-type impurities are simultaneously diffused in the substrate. After the oxide film is removed, the p-well is formed within the region of the substrate in which the n-type impurities are diffused.

Method of fabricating a semiconductor device having a triple well

In the system according to the present invention detects defects by projecting illumination light for exposure having a certain wavelength perpendicularly onto a phase shift mask to be examined; picking up, by means of an image acquisition section, two pattern images which are formed from the irradiated light having passed through two neighboring dies on the phase shift mask and image-formed individually through respective magnifying projection optical systems, and superposing the image patterns of two dies through an alignment to compare therebetween.

Defect inspection system for phase shift masks

A method for forming a resist mask pattern by light exposure providing the steps of forming a resist layer on a semiconductor substrate, forming a phase shifter pattern for inverting a phase of exposed light in an upper portion of the resist layer itself or over the surface of the resist layer, exposing the surface of the semiconductor substrate including the phase shifter pattern, and forming a fine mask pattern below the edge of the phase shifter pattern.

Method for forming resist mask pattern by light exposure having a phase

A manufacturing process for a semiconductor device comprising the following steps: to spin-coat by Spin-on method a solution for forming a SOG film on a wafer having a device formed on the surface to form a coating of the SOG film forming solute thereon; to treat by a liquid which is able to dissolve the solute for forming SOG film at least a part of the wafer which is held by claws of a dry etching system at a later stage in the series of processes, thereby removing a coating of the SOG film forming solute at that part; and to then bake the wafer to complete a SOG film.

Manufacturing process for semiconductor device

An easily circuit-programmable semiconductor device which comprises a dynamic random access memory (DRAM) unit, a redundancy circuit and a connection between them, the DRAM unit having as a capacitor a dielectric film made of a silicon oxide/silicon nitride/silicon oxide composite layer and the connection having, as a member for programming the redundancy circuit, an electrically breakable dielectric film made of a silicon oxide/silicon nitride/silicon oxide composite layer.

Redundant memory device having a memory cell and electrically breakable

A process for producing a semiconductor device including the steps of:

Growing community of inventors

Kitakatsuragi, Japan

Makoto Tanigawa