Renesas Electronics Corporation

Renesas Technology Corp.

Makoto Hatori

Yutaka Hoshino

Masatoshi Morikawa

Tomoyuki Miyake

The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n-type source region of an LDMOSFET, and no such metal silicide film is formed on an n-type offset drain region, an n-type offset drain region, and an n-type drain region. A side wall spacer comprising a silicon film is formed via an insulating film on the side wall of the gate electrode over the drain side thereof, and a field plate electrode is formed by this side wall spacer. The field plate electrode does not extend above the gate electrode, and a metal silicide film is formed over the entire upper surface of the gate electrode in the silicide process.

Semiconductor device

To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an ntype drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an ntype offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.

Growing community of inventors

Fussa, Japan

Makoto Hatori