Semiconductor Energy Laboratory Co., Ltd.

Makoto Furuno

Shunpei Yamazaki

Osamu Nakamura

Shinji Maekawa

Keitaro Imai

Tamae Takano

Yoshinobu Asami

Satoshi Toriumi

Junichiro Sakata

Yasuhiro Jinbo

Tomokazu Yokoi

Jun Koyama

Koji Dairiki

Mitsuhiro Ichijo

Sachiaki Teduka

Hideaki Kuwabara

Kenichi Okazaki

Tetsuhiro Tanaka

Takayuki Inoue

Seiji Yasumoto

Takashi Ohtsuki

Ryota Tajima

Takashi Shimazu

Masakazu Murakami

Taichi Nozawa

Tetsuo Sugiyama

An object is to provide a deposition method in which a gallium oxide film is formed by a DC sputtering method. Another object is to provide a method for manufacturing a semiconductor device using a gallium oxide film as an insulating layer such as a gate insulating layer of a transistor. An insulating film is formed by a DC sputtering method or a pulsed DC sputtering method, using an oxide target including gallium oxide (also referred to as GaO). The oxide target includes GaO, and X is less than 1.5, preferably more than or equal to 0.01 and less than or equal to 0.5, further preferably more than or equal to 0.1 and less than or equal to 0.2. The oxide target has conductivity, and sputtering is performed in an oxygen gas atmosphere or a mixed atmosphere of an oxygen gas and a rare gas such as argon.

Deposition method and method for manufacturing semiconductor device

A method for cleaning a hot-wall type film formation apparatus having a batch processing system with industrially high mass productivity is provided. In the method, a carbon film deposited on an inner wall or the like of a reaction chamber of the apparatus is removed efficiently in a short time. To remove the carbon film deposited on the inner wall of the reaction chamber by a thermal CVD method, the reaction chamber is heated at a temperature higher than or equal to 700&#xb0; C. and lower than or equal to 800&#xb0; C., and oxygen is introduced into the reaction chamber.

Method for cleaning film formation apparatus and method for manufacturing semiconductor device

At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.

Method for manufacturing display device

To provide a method for manufacturing a power storage device which enables improvement in performance of the power storage device, such as an increase in discharge capacity. To provide a method for forming a semiconductor region which is used for a power storage device or the like so as to improve performance. A method for forming a crystalline semiconductor region includes the steps of: forming, over a conductive layer, a crystalline semiconductor region that includes a plurality of whiskers including a crystalline semiconductor by an LPCVD method; and performing heat treatment on the crystalline semiconductor region after supply of a source gas containing a deposition gas including silicon is stopped. A method for manufacturing a power storage device includes the step of using the crystalline semiconductor region as an active material layer of the power storage device.

Method for forming semiconductor region and method for manufacturing power storage device

It is an object to provide a nonvolatile semiconductor memory device having excellent writing property and charge-retention property. A semiconductor layer including a channel forming region between a pair of impurity regions which are formed to be apart from each other is provided. In an upper layer portion thereof, a first insulating layer, a floating gate, a second insulating layer, and a control gate are provided. The floating gate has at least a two-layer structure, and a first layer in contact with the first insulating layer preferably has a band gap smaller than that of the semiconductor layer. Furthermore, by setting an energy level at the bottom of the conduction band of the floating gate lower than that of the channel forming region of the semiconductor layer, injectability of carriers and a charge-retention property can be improved.

Nonvolatile semiconductor memory device

Provided are a semiconductor film including silicon microstructures formed at high density, and a manufacturing method thereof. Further, provided are a semiconductor film including silicon microstructures whose density is controlled, and a manufacturing method thereof. Furthermore, a power storage device with improved charge-discharge capacity is provided. A manufacturing method in which a semiconductor film with a silicon layer including silicon structures is formed over a substrate with a metal surface is used. The thickness of a silicide layer formed by reaction between the metal and the silicon is controlled, so that the grain sizes of silicide grains formed at an interface between the silicide layer and the silicon layer are controlled and the shapes of the silicon structures are controlled. Such a semiconductor film can be applied to an electrode of a power storage device.

Semiconductor film, method for manufacturing the same, and power storage device

Display device

To provide a semiconductor substrate including a crystalline semiconductor layer which is suitable for practical use, even if a material different from that of the semiconductor layer is used for a supporting substrate, and a semiconductor device using the semiconductor substrate. The semiconductor substrate includes a bonding layer which forms a bonding plane, a barrier layer formed of an insulating material containing nitrogen, a relief layer which is formed of an insulating material that includes nitrogen at less than 20 at. % and hydrogen at 1 at. % to 20 at. %, and an insulating layer containing a halogen, between a supporting substrate and a single-crystal semiconductor layer. The semiconductor device includes the above-described structure at least partially, and a gate insulating layer formed by a microwave plasma CVD method using SiHand NO as source gases is in contact with the single-crystal semiconductor layer.

Semiconductor substrate and manufacturing method of semiconductor device

The present invention relates to a semiconductor device including a thin film transistor comprising a microcrystalline semiconductor which forms a channel formation region and includes an acceptor impurity element, and to a manufacturing method thereof. A gate electrode, a gate insulating film formed over the gate electrode, a first semiconductor layer which is formed over the gate insulating film and is formed of a microcrystalline semiconductor, a second semiconductor layer which is formed over the first semiconductor layer and includes an amorphous semiconductor, and a source region and a drain region which are formed over the second semiconductor layer are provided in the thin film transistor. A channel is formed in the first semiconductor layer when the thin film transistor is placed in an on state.

Thin film transistor having microcrystalline semiconductor layer

When semi-amorphous TFTs are used for forming a signal line driver circuit and a pixel, a large amplitude is required for driving the pixel, and a large power supply voltage is thus needed. On the other hand, when a shift register is made up of transistors having a single conductivity, a bootstrap circuit is required, and a voltage over a power supply is applied to a specific element. Therefore, not both the driving amplitude and the reliability can be achieved with a single power supply. According to the invention, a level shifter having a single conductivity is provided to solve such a problem.

Electric characteristics of a thin film transistor including a channel formation region including a microcrystalline semiconductor are improved. The thin film transistor includes a gate electrode, a gate insulating film formed over the gate electrode, a microcrystalline semiconductor layer formed over the gate insulating film, a semiconductor layer which is formed over the microcrystalline semiconductor layer and includes an amorphous semiconductor, and a source region and a drain region which are formed over the semiconductor layer. A channel is formed in the microcrystalline semiconductor layer when the thin film transistor is placed in an on state, and the microcrystalline semiconductor layer includes an impurity element for functioning as an acceptor. The microcrystalline semiconductor layer is formed by a plasma-enhanced chemical vapor deposition method. In forming the microcrystalline semiconductor layer, a process gas is excited with two or more kinds of high-frequency electric power with different frequencies.

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Atsugi, Japan

Makoto Furuno