Lexar Media, Inc.

Avalanche Technology, Inc.

Cirrus Logic Inc.

Micron Technology Incorporated

Lexar Microsystems, Inc.

Lexar

Lexa Media, Inc.

Mahmud M Assar

Petro Estakhri

Parviz Keshtbod

Rajiv Yadav Ranjan

Siamack Nemazie

Dayakar C Reddy

Suhas S Patil

Boyd Gayle Pett

H Ravindra

Ernest S Lin

Berhanu Iman

Vlad Bril

Mahmood Mozaffari

Prakash C Agarwal

Robert Alan Reid

Abdual Q Kashmiri

A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.

High capacity low cost multi-state magnetic memory

A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

Non-volatile flash-RAM memory with magnetic memory

A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.

Non-uniform switching based non-volatile magnetic based memory

A method of flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

Low-cost non-volatile flash-RAM memory

High-capacity low cost multi-state magnetic memory

Systems having a host computer system, a memory device coupled to the host computer system, and identification circuitry. The identification circuitry is configured to identify an operating mode of the host computer system from comparing applied signals to sensed signals.

Systems configured to identify an operating mode

A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.

Memory devices having a memory module, an interface, identification circuitry and a controller coupled to the memory module and the identification circuitry. The identification circuitry is configured to identify a selected operating mode from a plurality of signals sensed at the interface in response to a plurality of signals previously applied to the interface by the identification circuitry. The controller is operable to configure the memory device to the selected operating mode responsive to the identification circuitry.

Memory devices configured to identify an operating mode

A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.

Direct logical block addressing flash memory mass storage architecture

Apparatus and methods provide for configuring a peripheral device in response to applying defined sets of signals to input/output terminals of the peripheral device, sensing the signals at those input/output terminals after applying the defined sets of signals, and comparing the sensed signals with the defined sets of signals.

Growing community of inventors

Morgan Hill, CA, United States of America

Mahmud M Assar