Renesas Electronics Corporation

Renesas Technology Corp.

Other

Mitsubishi Denki Kabushiki Kaisha

Mahito Sawada

Hiroshi Tobimatsu

Hiroyuki Kawata

Koyu Asai

Seiji Okura

Yuuki Kamiura

Satoshi Shimizu

Tadashi Yamaguchi

Katsuyuki Horita

Tatsunori Murata

Kiyoteru Kobayashi

Koji Oda

Tatsunori Kaneoka

Kouji Oda

Koji Shibata

Kouji Shibata

Takanori Sasaki

Kazuyuki Fujii

Kouichiro Tsutahara

To provide a semiconductor device provided with an element isolation structure capable of hindering an adverse effect on electric characteristics of a semiconductor element, and a method of manufacturing the same. The thickness of a first silicon oxide film left in a shallow trench isolation having a relatively narrow width is thinner than the first silicon oxide film left in a shallow trench isolation having a relatively wide width. A second silicon oxide film (an upper layer) having a relatively high compressive stress by an HDP-CVD method is more thickly laminated over the first silicon oxide film in a lower layer by a thinned thickness of the first silicon oxide film. The compressive stress of an element isolation oxide film finally formed in a shallow trench isolation having a relatively narrow width is more enhanced.

Semiconductor device and method of manufacturing the same

Semiconductor device with shallow trench isolation

In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

Semiconductor device

An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.

Interconnection structure of semiconductor device

A plurality of metal wire layers consisting of a first metal wire layer and a second metal wire layer are formed on a semiconductor substrate. A fluorinated silicate glass film serving as an interlayer metal dielectric film is formed between the first and second metal wire layers. A silicon nitride film serving as a protective insulation film is formed on the fluorinated silicate glass film layer. An adhesive layer made of, for example, a P&#x2014;SiO film, P&#x2014;SiON film, or PE-SiO film, is formed between the fluorinated silicate glass film and the silicon nitride film.

Semiconductor device with a fluorinated silicate glass film as an interlayer metal dielectric film, and manufacturing method thereof

An interconnection is formed on a semiconductor substrate having a semiconductor element formed thereon. Next, a passivation film is formed on the semiconductor substrate including the interconnection. Further, a polyimide film, which is served as a buffer coating film, is formed on the passivation film. Further, the polyimide film is patterned. Next, the passivation film is subject to etching while the patterned polyimide film is taken as a mask. Next, a hardened layer, which is formed on the surface of the polyimide film as a result of etching, is removed through ashing process. Next, the semiconductor substrate after ashing process is cured so as to transform the polyimide film into imide.

Method of manufacturing semiconductor device having passivation film and buffer coating film

A manufacturing method of a semiconductor device allowing successful filling of an insulating film by HDP-CVD (High Density Plasma-Chemical Vapor Deposition) in a gap or valley between densely placed interconnections is provided. The method includes the steps of forming semiconductor elements on a semiconductor substrate, forming on the semiconductor elements a plurality of interconnections with top protective layers side by side to electrically connect the semiconductor elements, forming a protective insulating film by CVD other than HDP-CVD to cover top and side surfaces of the interconnections and a bottom surface of a gap between the interconnections, and forming an insulating film by HDP-CVD to cover the protective insulating film and to fill in the gap between the interconnections covered with the protective insulating film.

Semiconductor device and manufacturing method thereof

A plurality of metal wire layers consisting of a first metal wire layer and a second metal wire layer are formed on a semiconductor substrate. A fluorinated silicate glass film serving as an interlayer metal dielectric film is formed between the first and second metal wire layers. A silicon nitride film serving as a protective insulation film is formed on the fluorinated silicate glass film layer. An adhesive layer made of, for example, a P&mdash;SiO film, P&mdash;SiON film, or PE&mdash;SiO film, is formed between the fluorinated silicate glass film and the silicon nitride film.

A method of manufacturing a semiconductor device is provided, which prevents a polyimide film from coming unstuck from a film to be subjected to isotropic etching, and further prevents deposits adhered to respective side faces of the films from coming off, during a heat treatment for imidizing the polyimide film. Isotropic etching is performed on a silicon nitride film using, as a mask, a polyimide film having a predetermined pattern formed therein. Next, a heat treatment is carried out to imidize the polyimide film prior to performing anisotropic etching on a silicon oxide film . During the heat treatment for imidizing the polyimide film , since deposits, which are to be generated by anisotropic etching, are not yet adhered to the respective side faces of the films, the polyimide film does not come unstuck from the silicon nitride film . Further, the deposits which are adhered to the respective side face of the films after the heat treatment will not come off.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device using a polishing apparatus is provided. A top ring holding a wafer is arranged on a pad. A polishing chemical liquid supply line for supplying a polishing chemical liquid is arranged above the pad in a direction ahead of rotation with respect to the top ring. Around the center of rotation of the pad, a partition plate having a columnar side surface is arranged. Above the pad on a side which goes away from the top ring when the pad is rotated, a polishing chemical liquid draining mechanism is arranged extending continuously from the partition plate to the outer periphery of the pad. Accordingly, a polishing apparatus is obtained by which the amount of polishing of the surface to be polished of the semiconductor substrate is stabilized and generation of microscratches on the surface to be polished can be suppressed.

Growing community of inventors

Tokyo, Japan

Mahito Sawada