Infineon Technologies Ag

Intel Mobile Communications Gmbh

Infineon Technologies Dresden Gmbh & Co . Kg

Ludwig Heitzer

Michael Bauer

Christian Stuempfl

Jens G Pohl

Peter Strobel

Thorsten Meyer

Klaus Elian

Cyrus Ghahremani

Derek Debie

Andreas Allmeier

Christian Geissler

David Tumpold

Marko Lemke

Dominic Maier

Matthias Eberl

Daniel Porwol

Johann Strasser

Johannes Lodermeyer

Stefan Woetzel

Oskar Neuhoff

Fabian Merbeler

Marcus Boehm

Christian Stümpfl

Michael Fuegl

Hans Ehm

Claudius Von Petersdorff-Campen

Eric Kuerzel

Christian Irrgang

Thomas Müller

The application relates to a semiconductor device for particle measurement having a cavity housing and a MEMS chip arranged inside the cavity housing. The housing includes a first opening, via which the cavity is connected to the surroundings and in which a first grating is arranged, which is capable by setting it to a first electrical potential of attracting particles from the surroundings and/or electrically charging them. The MEMS chip includes a membrane facing toward the first opening, which is capable by setting it to a second electrical potential of attracting particles. The application furthermore relates to a method for operating a semiconductor device having a cavity housing and a MEMS chip arranged inside the cavity housing.

Semiconductor device for particle measurement and method for operating the semiconductor device

A molded semiconductor package includes: a mold compound; a metal substrate partly embedded in the mold compound; at least one first metal lead partly embedded in the mold compound; an inlay embedded in the mold compound, the inlay comprising a semiconductor die embedded in an electrically insulating body, a first metal structure attached to a first side of the semiconductor die, and a second metal structure attached to a second side of the semiconductor die; and a metal clip at least partly embedded in the mold compound and connecting the second metal structure to the at least one first metal lead. The semiconductor die has a maximum junction temperature higher than a glass transition temperature of the mold compound, the electrically insulating body has a glass transition temperature at or above the maximum junction temperature of the semiconductor die, and the metal substrate is attached to the first metal structure.

Molded semiconductor package having an embedded inlay

A radiation source device includes at least one membrane layer, a radiation source structure to emit electromagnetic or infrared radiation, a substrate and a spacer structure, wherein the substrate and the at least one membrane form a chamber, wherein a pressure in the chamber is lower than or equal to a pressure outside of the chamber, and wherein the radiation source structure is arranged between the at least one membrane layer and the substrate.

Radiation source device

A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.

Tilted chip assembly for optical devices

A semiconductor battery includes a substrate, a battery anode semiconductor material arranged in or over the substrate, a battery cathode material arranged in or over the substrate and a battery electrolyte disposed between the battery anode semiconductor material and the battery cathode material. An electrically insulating encapsulant has a first face and a second face. The substrate is at least partly embedded in the encapsulant. An anode electrode is electrically connected to the battery anode semiconductor material and is disposed over the second face of the encapsulant. A cathode electrode is electrically connected to the battery cathode material and is disposed over the first face of the encapsulant.

Semiconductor battery and semiconductor device including a semiconductor battery

A semiconductor device and a method of making a semiconductor device are disclosed. The semiconductor device comprises a redistribution layer arranged over a chip, the redistribution layer comprising a first redistribution line. The semiconductor further comprises an isolation layer disposed over the redistribution layer, the isolation layer having a first opening forming a first pad area and a first interconnect located in the first opening and in contact with the first redistribution line.

Semiconductor device and method of manufacture thereof

A method for fabricating an electronic device includes providing a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first semiconductor die and a first solder interconnect layer applied to a main face of the first semiconductor die. The second semiconductor chip has a second semiconductor die, an insulating layer applied to a main face of the second semiconductor die, and a second solder interconnect layer applied to the insulating layer. The method further includes attaching the first semiconductor chip with the first solder interconnect layer to a first carrier and attaching the second semiconductor chip with the second solder interconnect layer to a second carrier.

Method for attaching a semiconductor die to a carrier

A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body.

Method for fabricating a semiconductor package and semiconductor package

A semiconductor device and a method of making a semiconductor device are disclosed. The semiconductor device comprises a redistribution layer arranged over a chip, the redistribution layer comprising a first redistribution line. The semiconductor further comprises an isolation layer disposed over the redistribution layer, the isolation layer having a first opening forming a first pad area and a first interconnect located in the first opening and in contact with the first redistribution line. The redistribution line in the first pad area is arranged orthogonal to a first direction to a neutral point of the semiconductor device.

A device includes a semiconductor chip having contact pads arranged on a first main face of the semiconductor chip. A first material has an elongation to break of greater than 35% covering the first main face of the semiconductor chip. An encapsulation body covers the semiconductor chip. A metal layer is electrically coupled to the contact pads of the semiconductor chip and extends over the encapsulation body.

Device including an encapsulated semiconductor chip and manufacturing method thereof

A method for producing an electronic component of a VQFN (very thin quad flat pack no-lead) design includes the following method steps: anchoring at least one integrated circuit element on a sacrificial substrate; contact-connecting the at least one integrated circuit element to the sacrificial substrate with formation of contact-connecting points on the sacrificial substrate; forming an encapsulation on a top side of the sacrificial substrate, the at least one anchored integrated circuit element being mounted on the top side of the sacrificial substrate; removing the sacrificial substrate, thereby uncovering a portion of the contact-connecting points on the underside of the encapsulation.

Electronic component of VQFN design and method for producing the same

This application relates to a method of manufacturing a semiconductor device comprising: providing multiple chips each comprising contact elements on a first main face of each of the multiple chips, and a first layer applied to each of the first main faces of the multiple chips; placing the multiple chips over a carrier with the first layers facing the carrier; applying encapsulation material to the multiple chips and the carrier to form an encapsulation workpiece embedding the multiple chips; and removing the carrier from the encapsulation workpiece.

Electronic device and method of manufacturing same

A plastic housing includes plastic external faces and the underside of the plastic housing comprises external contact areas on which external contacts are arranged. The plastic external faces are covered by a closed metal layer apart from the underside, wherein the boundary layer between plastic external faces and the closed metal layer includes exposed electrically conductive inclusions of the plastic of the housing.

Plastic housing and semiconductor component with said plastic housing

The invention pertains to a method for manufacturing an electronic component with a semiconductor element () that is contacted and fixed on a substrate surface (). The method is characterized in that the rear side of the semiconductor element and/or the substrate surface is coated with an adhesive structure consisting of a first component () that solidifies, particularly hardens or cures, and an electrically conductive second component () that does not solidify, wherein the semiconductor element is bonded to the substrate surface in a contacting fashion. The electronic component is characterized in that a structured adhesive layer arranged between the semiconductor element and the substrate surface comprises a solidifying first component () and an electrically conductive non-solidifying second component ().

Method for manufacturing an electronic component and corresponding electronic component

A semiconductor device with a thinned semiconductor chip and a method for producing the latter is disclosed. In one embodiment, the thinned semiconductor chip has a top side with contact areas and a rear side with a rear side electrode. In this case, the rear side electrode is cohesively connected to a chip pad of a circuit carrier via an electrically conductive layer. In another embodiment, the thinned semiconductor chips of this semiconductor device according to the invention have low-microdefect edge side regions with semiconductor element structures and edge sides patterned by etching technology.

Growing community of inventors

Wuppertal, Germany

Ludwig Heitzer