International Business Machines Corporation

Other

Lisa Jeanine Jimarez

Miguel Angel Jimarez

Donald Seton Farquhar

Voya Rista Markovich

Mark Vincent Pierson

Brenda Lee Peterson

Krystyna Waleria Semkow

Charles Hampton Perry

David Noel Light

Brian Eugene Curcio

Cynthia Susan Milkovich

Kathleen Lorraine Covert

Keith P Brodock

William Louis Brodsky

David Brian Stone

Natalie Barbara Feilchenfeld

Li Li

James Robert Wilcox

Michael Joseph Klodowski

Andrew Michael Seman

Donald I Mead

Thomas M Culnane

Jeffrey Alan Zimmerman

David N Cokely

Eugen Schenfeld

Robert Maynard Japp

Carlos Juan Sambucetti

Subhash Laxman Shinde

Steven Paul Ostrander

Monty Montague Denneau

Dinesh Gupta

James Russell Bupp

William H Lawrence

Craig G Heim

Bonnie S McClure

Robert J Owen

William F Wildey

Mark R Brinthaupt, Iii

The current invention provides a method of attaching a plurality of cores wherein a core has a via with a conductive surface to be electrically connected to a conductive surface on another core. The method provides for applying a metallurgical paste to a conductive surface, removing a portion of the flux from the paste and joining the two cores. The current invention also provides a structure including a plurality of cores wherein a metallurgical paste electrically connects a via with a conductive surface on a core to a conductive surface on another core.

Z interconnect structure and method

A method of forming a member for joining to form a composite wiring board. The member includes a dielectric substrate. Adhesive tape is applied to at least one face of said substrate. At least one opening is formed through the substrate extending from one face to the other and through each adhesive tape. An electrically conductive material is dispensed in each of the openings and partially cured. The adhesive tape is removed to allow a nub of the conductive material to extend above the substrate face to form a wiring structure with other elements.

Method for producing Z-axis interconnection assembly of printed wiring board elements

An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.

Method of making an electronic package

Method and structure for producing Z-axis interconnection assembly of printed wiring board elements

Optical cubes and optical cube assemblies for directing optical beams are provided. The optical cubes are optically transparent modules that can be adapted to reflect, transmit, and/or partially reflect and transmit optical beams. The optical cubes may include bi-direction or multi-direction beam directing elements for directing optical beams. The optical cube assemblies may include flexible chip assemblies attached to optical cubes. The chip assemblies may include vertical cavity surface-emitting lasers for emitting optical beams or receivers for receiving optical beams mounted on a flexible and electrical interconnect mounting assembly.

Optical assemblies for transmitting and manipulating optical beams

A method and structure for reducing chip carrier flexing during thermal cycling. A semiconductor chip is coupled to a stiff chip carrier (i.e., a chip carrier having an elastic modulus of at least about 3&times;10 psi), and there is no stiffener ring on a periphery of the chip carrier. Without the stiffener ring, the chip carrier is able to undergo natural flexing (in contrast with constrained flexing) in response to a temperature change that induces thermal strains due to a mismatch in coefficient of thermal expansion between the chip and the chip carrier. If the temperature at the chip carrier changes from room temperature to a temperature of about &minus;40&deg; C., a maximum thermally induced displacement of a surface of the chip carrier is at least about 25% less if the stiffener ring is absent than if the stiffener ring is present. Since a propensity for cracking of the stiff chip carrier increases as the thermally induced displacement increases, the present invention, which avoids use of the stiffener ring, improves a structural integrity of the chip carrier.

Reduction of chip carrier flexing during thermal cycling

A chip mounting assembly is provided which includes a dielectric substrate having at least one integrated circuit (I/C) chip mounted thereon. An electrically conductive cover plate is in contact with all the chips with an electrically non-conducting thermally conducting adhesive. A stiffener member is provided which is mounted ante substrate and laterally spaced from the integrated circuit chip. At least one electrically conductive ground pad is formed an the substrate. The stiffener member has at least one through opening therein and electrically conductive adhesive extending through each opening and contacting the cover plate and each ground pad. The invention also provides a method of forming such an I/C chip assembly.

Method of forming a chip assembly

A method for conductively bonding a printed circuit board to a metal back plate is provided. The method includes the steps of providing a dielectric substrate that is metallized on its two faces; providing a metallic back plate; and bonding the metallic back plate to one of the metallized faces of the substrate using an electrically conductive adhesive that includes an adhesive polymer and at least one conductive metal having an electromagnetic force (EMF) that is equal to or less than one volt. The present invention also relates to a printed circuit board assembly which includes printed circuit board which includes a dielectric substrate having a first circuitized metallic layer disposed on one opposing face of the substrate and a second metallic layer disposed on the other opposing face of said substrate; a metal back plate; and an electrically conductive bonding layer disposed between the plate and the second metallic layer of the printed circuit board. The electrically conductive bonding layer contains an adhesive polymer and a conductive metal having an EMF that is less than one volt. The electrically conductive bonding layer is substantially free of silver.

Metal backed printed circuit board assemblies

A packaging platform for interconnecting integrated circuit chips and cards, in which the platform is a circuitized fluoropolymer-based laminate carrier including high purity fluoropolymer protective barriers on its surfaces.

High performance packaging platform and method of making same

Mixtures for attaching a semiconductor chip to a substrate. The semiconductor chip has an array of joining material bumps, such as C4 solder balls. The substrate has an array of conductive pads corresponding to the array of joining material bumps. In a first embodiment the fixture has a body having a first cavity containing the semiconductor chip and a second cavity for containing the substrate. The substrate is placed over the semiconductor chip with the conductive pads opposing and in contact with the joining material bumps, such that during reflow of the joining material bumps, the weight of the substrate acts against the joining material bumps and aids in the attachment of the semiconductor chip to the substrate to form electrical connections therebetween.

Method of attaching a conformal chip carrier to a flip chip

A multi-layer circuit board is disclosed. The circuit board comprises a plurality of conductive planes; a plurality of plated through hole sets, each set comprising one or more plated through holes, none to all of the plated through holes of each set contacting at least one the conductive plane; a thermal break formed around each plated through hole in each conductive plane to which the plated through hole is connected; and one or more thermal vents, in the vicinity of each plated through hole in each conductive plane to which the plated through hole is connected. Additionally, surface mount technology pads are provided on a top surface of the circuit board.

Hybrid surface mount and pin thru hole circuit board

Growing community of inventors

Newark Valley, NY, United States of America

Lisa Jeanine Jimarez