Applied Materials, Inc.

Iowa State University Research Foundation Inc

Liangfa Hu

Abdul Aziz Khaja

Prashant Kumar Kulshreshtha

Ganesh Balasubramanian

Sarah Michelle Bobek

Yoichi Suzuki

Li-Qun Xia

Kwangduk Douglas Lee

Iver E Anderson

Vinay K Prabhakar

Sudha S Rathi

Michael Wenyoung Tsiang

Ratsamee Limdulpaiboon

Anjana M Patel

Viren Kalsekar

Byung Seok Kwon

Matthew J Kramer

David J Byrd

Emma Marie Hamilton White

Aaron G Kassen

Kevin Hsiao

Satya Teja Babu Thokachichu

Yayun Cheng

Embodiments of the present disclosure generally relate to apparatus and methods for reducing substrate backside damage during semiconductor device processing. In one implementation, a method of chucking a substrate in a substrate process chamber includes exposing the substrate to a plasma preheat treatment prior to applying a chucking voltage to a substrate support. In one implementation, a substrate support is provided and includes a body having an electrode and thermal control device disposed therein. A plurality of substrate supporting features are formed on an upper surface of the body, each of the substrate supporting features having a substrate supporting surface and a rounded edge.

Methods and apparatus for minimizing substrate backside damage

The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.

Methods of reducing chamber residues

Exemplary processing methods may include forming a plasma of a deposition precursor in a processing region of a semiconductor processing chamber. The methods may include adjusting a variable capacitor within 20% of a resonance peak. The variable capacitor may be coupled with an electrode incorporated within a substrate support on which a substrate is seated. The methods may include depositing a material on the substrate.

Hardmask tuning by electrode adjustment

Improved manufacturing processes and resulting anisotropic permanent magnets, such as for example alnico permanent magnets, having highly controlled and aligned microstructure in the solid state are provided. A certain process embodiment involves applying a particular orientation and strength of magnetic field to loose, binder-coated magnet alloy powder particles in a compact-forming device as they are being formed into a compact in order to preferentially align the magnet alloy powder particles in the compact. The preferential alignment of the magnet alloy powder particle is locked in place in the compact by the binder after compact forming is complete. After removal from the device, the compact can be subjected to a subsequent sintering or other heat treating operation.

Heat treatable magnets having improved alignment through application of external magnetic field during binder-assisted molding

The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.

Methods of minimizing wafer backside damage in semiconductor wafer processing

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San Jose, CA, United States of America

Liangfa Hu