International Business Machines Corporation

Ultratech, Inc.

Lewis Sigmund Goldmann

Hilton T Toy

Mark G Courtney

Patrick Anthony Coico

Raymond A Jackson

Peter Jeffrey Brofman

Kathleen Ann Stalter

Gregory Blair Martin

David L Edwards

Frank Louis Pompeo

Raed A Sherif

William Edward Sablinski

Eric D Perfecto

Shaji Farooq

James H Covell

Jeffrey Thomas Coffin

Michael J Ellsworth, Jr

Sushumna Iruvanti

Charles Hampton Perry

Mario John Interrante

Chandrika Prasad

David C Linnell

Joseph Michael Sullivan

Li Ming Wang

Stephen S Drofitz, Jr

John Ulrich Knickerbocker

Voya Rista Markovich

Mukta G Farooq

Sampath Purushothaman

Peter Alfred Gruber

Roy Rongqing Yu

John Anthony Fitzsimmons

Benjamin V Fasano

Jeffrey Allen Zitz

William E Bernier

Tien-Jen Cheng

Richard Francis Indyk

Lannie R Bolde

Giulio DiGiacomo

Ajay Prabhakar Giri

Emanuele F Lopergolo

Kimberley A Kelly

Marie S Cole

David E Eichstadt

Armando S Cammarano

Bouwe W Leenstra

William Frederick Shutler

Tasha E Lopez

David J Welsh

Richard L Canull

John G Torok

Raschid Jose Bezama

Sudipta Kumar Ray

Anson Jay Call

Michael Sean June

Donald Rene Wall

Srinivasa S Reddy

Mukta S Farooq

Gaetano Paolo Messina

Harvey Charles Hamel

Brenda Lee Peterson

Karl J Puttlitz, Sr

Michael Berger

Scott Ira Langenthal

Sundar M Kamath

Stephen Anthony DeLaurentis

Thomas P Moyer

Charles R Tompkins, Jr

Paul A Zucco

Amy B Ostrander

Vladimir Jambrih

Ellyn M Ingalls

Marlene W Moyer

Kevin G Bivona

Kimberly A Kelly

Solder mold plates and methods of manufacturing the solder mold plates are provided herein. The solder mold plates are used in controlled collapse chip connection processes. The solder mold plate includes a plurality of cavities. At least one cavity of the plurality of cavities has a different volume than another of the cavities in a particular chip set site. The method of manufacturing the solder mold plate includes determining susceptible white bump locations on a chip set. The method further includes forming lower volume cavities on the solder mold plate which coincide with the susceptible white bump locations, and forming higher volume cavities on the solder mold plate which coincide with less susceptible white bump locations.

Solder mold plates used in packaging process and method of manufacturing solder mold plates

An article supports a workpiece during thermal processing. At least three elongated support members, e.g., support pins, extend upwardly from an element such as support arms for supporting the workpiece. Each of the support members includes a first portion adjacent to the workpiece. A second portion extends downwardly from the first portion. The first portion can have a thermal response faster than the thermal response of the workpiece and the second portion can have a slower thermal response. A removable element may be mounted to the support member for adjusting the thermal response of the support member. With removable elements, the support members can be adjusted to cause no net transfer of heat to or from the workpiece.

Method and structure to control thermal gradients in semiconductor wafers during rapid thermal processing

Disclosed is a method of forming an integrated circuit structure that forms lead-free connectors on a device, surrounds the lead-free connectors with a compressible film, connects the device to a carrier (the lead-free connectors electrically connect the device to the carrier), and fills the gaps between the carrier and the device with an insulating underfill.

Compressible films surrounding solder connectors

An integrated circuit chip mounting structure includes a chip carrier electrically connected to a circuit board with an integrated circuit chip mounted on the chip carrier. In addition, a thermally conductive device is thermally connected to the chip and a set of compressible support members are provided to transmit a portion of an applied compressive load from the thermally conductive device to the chip and chip carrier.

Method and structure to provide balanced mechanical loading of devices in compressively loaded environments

An IC chip package and related method are disclosed. The IC chip package may include a printed circuit board (PCB) coupled to a chip carrier by a land grid array (LGA) connector; a metal stiffener including at least one force-adjustable member contacting an underside of the PCB; and at least two couplers for coupling the metal stiffener to a lid or a heat sink, with the PCB, the chip carrier and the LGA connector therebetween. The force-adjustable member reduces the required assembly forces and accommodates natural and non-systematic out-of flatness tolerances of the PCB and the chip carrier.

IC chip package having force-adjustable member between stiffener and printed circuit board

Methods of engaging an electronic module interconnected to a circuit board to a heat sink using clamping assemblies that maintain integrities of an interconnection grid array and the electronic module. A loading block having a plurality of legs is positioned at a backside of the module toward the circuit board in a location corresponding to a central area of the interconnection grid array. A spring having a central fastening means and plurality of peripheral securing means is positioned adjacent the loading block. The fastening means is actuated whereby central backside compressive forces are directed at and force the loading block against the circuit board, while forces are applied to the securing means for engaging the securing means into the heat sink such that the electronic module is engaged with the heat sink. The clamping assembly relocates the regions of highest compression on the interconnection array, thereby maintaining the integrity thereof.

Electronic module assembly

A system and method to form a reworkable compression seal between an electronic module and a cap are disclosed. The system and method include an electronic module having a tapered edge configured on at least a portion of the edge defining a perimeter of the electronic module and the cap configured with an opening to receive the electronic module therein. A compression seal is disposed with the cap and is configured to surround one or more chips or other electronic components on the electronic module to form a seal between the electronic module and the cap. A plurality of side loaders are operably coupled to the cap and aligned to receive the tapered edge on the electronic module. Each side loader is configured to engage the tapered edge and provide sufficient compressive force to the compression seal disposed between the electronic module and the cap.

Method and apparatus to form a reworkable seal on an electronic module

A method of forming an electrical connection between two devices is disclosed. In an exemplary embodiment of the invention, the method includes soldering a second solderable cap of an interconnection to a first contact pad of a first component. The interconnection further includes a conductive polymer comprising a polymer component and a conductive component A first solderable cap is disposed in contact with the conductive polymer, and the second solderable cap is disposed in contact with the conductive polymer opposite the first solderable cap. The first solderable cap is then soldered to a second contact pad of a second component.

Conductive polymer interconnection configurations

A semi-conductor wafer test or burn-in apparatus having spring contacts made from a shape memory metal which plastically deforms under normal test loading and has a transition temperature at or above or at or below the burn-in temperature.

Full wafer test configuration using memory metals

A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.

Process for forming a multi-level thin-film electronic packaging structure

A capping structure and capping method are presented for an electronics package having a substrate and one or more electronics devices disposed on the substrate. The capping structure includes a capping plate sized to cover the electronics device(s) disposed on the substrate, and two or more force transfer pins. The force transfer pins are disposed between the capping plate and the substrate so that when a force is applied to the capping plate or the substrate, the force is transferred therebetween via the force transfer pins. Various capping plate and pin configurations are presented.

Capping structure for electronics package undergoing compressive socket actuation

A method and apparatus is provided for forming an electronic assembly whereby an insulating polymer matrix having a plurality of conductor holes is attached to a first substrate wherein the conductor holes align with a corresponding contact array on the first substrate. Subsequently, a flexible, electrically conductive adhesive is provided within the plurality of conductor holes and a solid conductive material, preferably having a high melting temperature, is attached to at least one end thereof. The insulating polymer matrix with the electrically conductive adhesive and the solid conductive material is then cured at a temperature sufficient to completely cure the matrix to completely surround the electrically conductive adhesive, as well as permanently attaching the matrix and conductive adhesive to the first substrate and permanently attaching the solid conductive material to the conductive adhesive. A second substrate may then be attached to the conductive matrix structure secured to the first substrate by providing a low melting temperature attachment means to the solid conductive material attached to the matrix and subsequently reflowing the assembly to form an electronic assembly adapted with the capability of reworkability.

Conductive adhesive interconnection with insulating polymer carrier

A sealed electronic circuit module includes a ceramic chip carrier with a top surface, a cover having a mating surface and a seal at the periphery of the carrier between the carrier and the cover. The seal includes a non-metallic soft lower frame, preferably polyimide, atop the carrier at the periphery of the carrier. There is an upper adhesion layer shaped as a matching an upper frame facing downwardly from the cover towards the lower frame. Above the soft lower frame is a lower metal adhesion layer. Between the upper frame and the lower adhesion layer is a solder layer which has been heated to seal the cover to the chip carrier. The soft frame can include a channel through which a metal to metal via-seal is formed by the lower metal adhesion layer and the solder through the channel through the soft layer or there can be a lateral extension of the lower metal adhesion layer to a distal location beyond the periphery of the soft lower frame.

Package with low stress hermetic seal

Growing community of inventors

Bedford, NY, United States of America

Lewis Sigmund Goldmann