Advanced Research and Applications Corporation

Leslie J Palkuti

A method for reliability testing of wafer stage integrated circuit devices wherein a hardness factor is established relating device substrate currents to device lifetimes attributable to interface trap degradation. A beam of ionizing radiation is then directed onto the device until a critical dose is reached, at which time the device fails. The critical dose is plotted against hardness factors so that device lifetimes may be predicted.

Method for reliability testing of integrated circuits

A test apparatus for electron devices, such as integrated circuits, at the wafer stage of fabrication, wherein a beam of ionizing radiation is directed through an electrical probe card and onto the wafer under test. The probe card and the radiation beam share a common port through which a selected device or group of devices is exposed, but other devices on the wafer are not similarly exposed. A microscope, supported on a frame, is interchangeable with the radiation beam source, sharing the common port, so that a tested device may be observed.

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Sunnyvale, CA, United States of America

Leslie J Palkuti