Intel Corporation

Leo D Yau

Mark T Bohr

Ken K Yu

Shyam G Garg

Michael R Oliver

Joseph R Breivogel

Sam F Louke

An improved composite polishing pad includes a first layer of elastic material, a second, stiff layer and a third layer optimized for slurry transport. This third layer is the layer against which the wafer makes contact during the polishing process. The second layer is segmented into individual sections physically isolated from one another in the lateral dimension. Each segmented section is resilient across its width yet cushioned by the first layer in the vertical direction. The physical isolation of each section combined with the cushioning of the first layer of material create a sort of 'bedspring' effect which enables the pad to conform to longitudinal gradations across the wafer.

Composite polishing pad for semiconductor process

A CMOS process is described which is particularly suited for forming dynamic memory cells. The cells are formed in an n-well and a single plate member formed from a first layer of polysilicon is used for the entire array. Unique etching of the first polysilicon layer prevents stringers from occurring when the second layer of polysilicon is deposited. A tri-layer dielectric is used for the capacitors in the array. Novel 'rear-end' processing is disclosed using a phosphorus doped glass.

CMOS process for fabricating integrated circuits, particularly dynamic

CMOS Process for fabricating integrated circuits, particularly dynamic

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Durham, OR, United States of America

Leo D Yau