Amkor Technology, Inc.

Adeia Semiconductor Bonding Technologies Inc.

Lee John Smith

Ronald Patrick Huemoeller

Thomas P Glenn

Masud Beroz

Robert Francis Darveaux

Sukianto Rusli

Teck-Gyu Kang

Kambhampati Ramakrishna

Vincent DiCaprio

Bob Shih-Wei Kuo

Michael Warner

David Albert Zoba

Glenn Urbish

Belgacem Haba

Roger D St Amand

Curtis Michael Zwenger

Jeffrey Alan Miks

Yoichi Kubota

Barry M Miles

Nozad Karim

David Bolognia

Jae M Park

Jong Ok Chun

Jon G Aday

Joseph Marco Longo

Jingkun Mao

Mike Kelly

A memory card comprising a flexible substrate (a 'flex') which is integrated in the memory card and folded in a prescribed manner subsequent to having various active and passive devices (e.g., controller and memory devices) surface mounted thereto. The active and passive devices are attached to a common side of the flex, and electrically connected to a conductive pattern disposed thereon. The conductive pattern itself electrically communicates with external signal contacts also formed on the flex. The use of folded flex technology in the memory card of the present invention allows the same to support four or more standard, pre-packaged memory devices, thus providing the memory card with substantially increased capacity.

High density memory card using folded flex

A semiconductor device has a substrate. A first die is electrically attached to a first surface of the substrate. A shield spacer having a first and second surface is provided wherein the second surface of the shield spacer is attached to a first surface of the first die. A plurality of wirebonds are attached to the shield spacer and to the substrate. A mold compound is provided for encapsulating the first die, the shield spacer, and the wirebonds.

Shielding for a semiconductor package

A semiconductor device has a first substrate having a plurality of metal traces. At least one electronic component is electrically attached to a first surface of the first substrate. A second substrate has a plurality of metal traces and attached to the first substrate. At least one electronic component is electrically attached to a first surface of the second substrate. An RF shield is formed on the first substrate to minimizing Electro-Magnetic Interference (EMI) radiation and Radio Frequency (RF) radiation to the at least one electronic component on the first substrate to form an RF shield. A mold compound is used for encapsulating the semiconductor device.

System and method for compartmental shielding of stacked packages

A semiconductor package including a leadframe which has one or more anchor pads formed on and/or defined by the die pad thereof. Such anchor pad(s) may be provided in any one of a multiplicity of different pad shapes, and are adapted to satisfy the required mechanical anchoring and thermal dissipation thresholds for the package, while still enabling high density circuit routing on the printed circuit board under the package. The leadframe of the semiconductor package further includes a plurality of leads which are segregated into at least two sets, with the leads of each set extending along and in spaced relation to respective ones of the peripheral edge segments defined by the die pad. Connected to the top surface of the die pad is at least one semiconductor die which is electrically connected to at least some of the leads of each set by conductive wires. The semiconductor die, the wires, and portions of the die pad and leads are encapsulated by a package body, the bottom surfaces of the anchor pads of the die pad and the bottom surfaces of the leads being exposed in or on a common exterior surface of the package body.

Semiconductor package having leadframe with exposed anchor pads

A method of forming a package includes forming a circuit pattern on a first carrier and embedding the circuit pattern in a dielectric material on a second carrier. The first carrier is removed and a buildup dielectric material is mounted to the dielectric material and the circuit pattern. Laser-ablated artifacts are formed in the buildup dielectric material and filled with an electrically conductive material to form a buildup circuit pattern. The second carrier is patterned into a stiffener, which provides rigidity to the thin package.

Thin substrate fabrication method and structure

A method includes forming a substrate layer, the substrate layer including a circuit pattern having terminals and bump pads. A stiffener is formed, the stiffener including via apertures having electrically conductive via aperture sidewalls and an electronic component opening. The stiffener is attached to the substrate layer. The electrically conductive via aperture sidewalls are electrically connected to the terminals. An electronic component is mounted to the bump pads and within the electronic component opening thus minimizing the height of the package. Further, the stiffener minimizing undesirable bending of the package and acts as an internal heat sink.

Ultra thin package and fabrication method

A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit panel so as to provide enhanced thermal conductivity to the circuit panel and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier.

High-frequency chip packages

A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.

High frequency chip packages with connecting elements

This invention provides a method for making a semiconductor package with stacked dies that eliminates fracturing of the upper die(s) during the wire bonding process. One embodiment of the method includes the provision of a substrate and pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed toward the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured, the second die is then wire bonded to the substrate, and the dies are then molded over with an encapsulant. The layer of adhesive prevents the second die from shorting the wires on the top of the first die, prevents the second die from being fractured during the wire bonding process, and prevents the encapsulant from forming a thermally expansive wedge between the two dies.

Method of making a semiconductor package including stacked semiconductor dies

Semiconductor package including stacked semiconductor dies and bond wires

Growing community of inventors

Chandler, AZ, United States of America

Lee John Smith