Texas Instruments Corporation

Lancy Y Tsung

Freidoon Mehrad

Adolfo Anciso

Thomas M Ambrose

Ming Yang

Sandra S Zheng

Jie Xia

Doug Matheson

The present invention provides, in one aspect, a method of imaging a microelectronics device. The method comprises cleaning, when contaminants are preset, a sample of a microelectronics deviceto be imaged with a first solution comprising hydrofluoric acid, an inorganic acid and water, exposing the sample to a second solution comprising hydrofluoric acid, an inorganic acid and an organic acid, wherein the second solution forms a contrast between different regions within the sample, and producing an image of the contrasted sample.

Chemical etch solution and technique for imaging a device's shallow junction profile

A method of preparing a TEM sample. A focused ion beam is used to deposit a mask on the material to be sampled. Reactive ion etching removes material not protected by the mask, leaving a wall thin enough to be imaged by TEM.

Mass production of cross-section TEM samples by focused ion beam deposition and anisotropic etching

A method of forming a semiconductor component having a conductive line ( ) and a silicide region ( ) that crosses a trench ( ). The method involves forming nitride sidewalls ( ) to protect the stack during the silicidation process.

Method to salicide source-line in flash memory with STI

A method to form an embedded FLASH integrated circuit with reduced processing steps is described. In the method a partial etch is performed on the control gate region of a polycrystalline silicon film ( ). A multiple etch process is then used to simultaneously form the FLASH memory cell gate stack ( ), the NMOS gate structure ( ) and the PMOS gate structure ( ).

Method to form an embedded flash memory circuit with reduced process steps

A method of forming a semiconductor component having a conductive line (,) that crosses a trench (,). The method involves forming steps (,) in the sidewalls of the trench (,) in a semiconductor substrate (,). A dopant may be implanted at a first energy level into the semiconductor substrate (,) to form a first conductive region (,). The dopant may be implanted at a second energy level into the semiconductor substrate (,) to form a second conductive region (,). The first energy level may be greater than the second energy level. The first conductive region (,) and the second conductive region (,) may form the conductive line (,).

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Plano, TX, United States of America

Lancy Y Tsung